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IC61LV5128-12T 参数 Datasheet PDF下载

IC61LV5128-12T图片预览
型号: IC61LV5128-12T
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×8高速CMOS静态RAM [512K x 8 HIGH-SPEED CMOS STATIC RAM]
分类和应用:
文件页数/大小: 9 页 / 157 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IC61LV5128  
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)  
-8  
-10  
Min.  
10  
3
-12  
Min.  
12  
3
-15  
Min.  
15  
3
Symbol Parameter  
Min.  
8
Max.  
8
Max.  
10  
10  
5
Max.  
12  
12  
6
Max.  
15  
15  
7
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tRC  
Read Cycle Time  
tAA  
Address Access Time  
Output Hold Time  
CE Access Time  
3
tOHA  
tACE  
tDOE  
tHZOE  
8
0
0
0
0
OE Access Time  
4
(2)  
OE to High-Z Output  
OE to Low-Z Output  
CE to High-Z Output  
CE to Low-Z Output  
4
5
6
6
(2)  
tLZOE  
0
4
5
6
0
6
(2  
tHZCE  
0
0
0
0
(2)  
tLZCE  
3
3
3
3
Notes:  
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of  
0 to 3.0V and output loading specified in Figure 1a.  
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.  
3. Not 100% tested.  
AC TEST CONDITIONS  
Parameter  
Input Pulse Level  
Input Rise and Fall Times  
Unit  
0V to 3.0V  
3 ns  
Input and Output Timing  
and Reference Levels  
1.5V  
Output Load  
See Figures 1 and 2  
Notes:  
1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.  
AC TEST LOADS  
319  
319 Ω  
3.3V  
3.3V  
OUTPUT  
OUTPUT  
353 Ω  
353 Ω  
30 pF  
5 pF  
Including  
jig and  
scope  
Including  
jig and  
scope  
Figure 1.  
Figure 2.  
Integrated Circuit Solution, Inc.  
AHSR021-0A 09/11/2001  
5
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