IC61LV5128
PIN CONFIGURATION
36-Pin SOJ
PIN CONFIGURATION
44-Pin TSOP-2
A0
A1
1
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
NC
NC
A0
A1
A2
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
NC
2
A18
A17
A16
A15
OE
2
3
A2
3
4
A18
A17
A16
A15
OE
I/O7
I/O6
GND
Vcc
I/O5
I/O4
A14
A13
A12
A11
A10
NC
A3
4
5
A4
5
A3
A4
6
CE
6
7
CE
I/O0
I/O1
Vcc
GND
I/O2
I/O3
WE
A5
A6
A7
A8
A9
8
I/O0
I/O1
Vcc
GND
I/O2
I/O3
WE
A5
7
I/O7
I/O6
GND
Vcc
I/O5
I/O4
A14
A13
A12
A11
A10
NC
9
8
10
11
12
13
14
15
16
17
18
19
20
21
22
9
10
11
12
13
14
15
16
17
18
A6
A7
NC
NC
NC
NC
A8
A9
TRUTH TABLE
PIN DESCRIPTIONS
Mode
WE
CE
OE
I/O Operation Vcc Current
A0-A18
Address Inputs
Not Selected
(Power-down)
X
H
X
High-Z
ISB1, ISB2
CE
Chip Enable Input
Output Enable Input
Write Enable Input
Input/Output
OE
Output Disabled
Read
H
H
L
L
L
L
H
L
High-Z
DOUT
DIN
ICC
ICC
ICC
WE
I/O0-I/O7
Vcc
Write
X
Power
GND
NC
Ground
No Connection
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
Unit
VTERM
TBIAS
TSTG
PD
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
–0.5 to Vcc + 0.5 V
–55 to +125
–65 to +150
1.0
°C
°C
W
Power Dissipation
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Integrated Circuit Solution, Inc.
AHSR021-0A 09/11/2001
3