ICS1893BY-10 - Release
Chapter 8 Pin Diagram, Listings, and Descriptions
Table 8-5. MAC/Repeater Interface Pins: Media Independent Interface (MII) (Continued)
Pin
Pin
Pin
Pin Description
Name Number
Type
RXER
39
Output Receive Error.
When the MAC/Repeater Interface is in:
• 10M MII mode, RXER is not used.
• 100M MII mode, the ICS1893BY-10 asserts a signal on the RXER pin
when either of the following two conditions are true:
– Errors are detected during the reception of valid frames
– A False Carrier is detected
Note:
1. An ICS1893BY-10 asserts a signal on the RXER pin upon detection of
a False Carrier so that repeater applications can prevent the
propagation of a False Carrier.
2. The RXER signal always transitions synchronously with RXCLK.
3. The signal on RXER pin is conditioned by the RXTRI pin.
RXTRI
TXCLK
41
43
Input
Receive (Interface), Tri-State.
The input on this pin is from a MAC. When the signal on this pin is logic:
• Low, the MAC indicates that it is not in a tri-state condition.
• High, the MAC indicates that it is in a tri-state condition. In this case,
the ICS1893BY-10 acts to ensure that only one PHY is active at a time.
Output Transmit Clock.
The ICS1893BY-10 generates this clock signal to synchronize the transfer
of data from the MAC/Repeater Interface to the ICS1893BY-10. When the
mode is:
• 10Base-T, the TXCLK frequency is 2.5 MHz.
• 100Base-TX, the TXCLK frequency is 25 MHz.
TXD0
TXD1
TXD2
TXD3
45
46
47
48
Input
Transmit Data 0–3.
• TXD0 is the least-significant bit and TXD3 is the most-significant bit of
the MII transmit data nibble received from the MAC/repeater.
• The ICS1893BY-10 samples its TXEN signal to determine when data
is available for transmission. When TXEN is asserted, the signals on a
the TXD[3:0] pins are sampled synchronously on the rising edges of
the TXCLK signal.
ICS1893BY-10 Rev A 3/24/04
March, 2004
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
109
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
