iC-MR 13-BIT S&H SIN/COS
INTERPOLATOR WITH CONTROLLER INTERFACES
Rev A1, Page 13/44
t
t
MAS
req
REQ
MAI
DATA
DATA
DATA
DATA
SLO
t
timeout
t
t
t
pMASLO
MASh MASl
Figure 4: SSI protocol timing.
MAI
START
DATA
DATA
SLO
t
busy
Figure 5: BiSS C protocol timing with conversion time t()IPO (ACQMODE = 00)
t
MAS
MAI
START
DATA
DATA
SLO
t
timeout
t
t
t
pMASLO
MASh MASl
t
timeout
Figure 6: BiSS C protocol timing without conversion time t()IPO (ACQMODE = 00)
NCS
MAI
SLI
SLO
t
MAS
t
t
t
CH
t
CL
MASh
MASl
Figure 7: SPI protocol timing.