iC-JRX
µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS
Rev A1, Page 2/23
DESCRIPTION
iC-JRX is an 8-fold high-side driver with integrated control logic, internally divided into two independent blocks
(nibbles). Both blocks can be individually set to input or output. The µP interface is made up of eight data, five
address and three control pins. Two further clock inputs control internal sequences (input filter, pulse
operation of the outputs). Starting with reset state, various register partitionings dependent on the selected
operating mode are possible.
Input mode is used to log logic levels at 24 V. An interrupt message can be generated when a signal at the
inputs changes. Spurious signals are rejected by the device's adjustable digital filters. When the inputs are
open the programmable pull-down current sets defined levels and acts as the bias current for switching
contacts.
In output mode the power output stages can drive any desired load to GND (e.g. lamps, long cables or relays)
at a continuous current of 100 mA or 500 mA in pulse operation. Spikes and flyback currents are discharged
through the integrated flyback circuits. All output stages are short-circuit-proof and two-stage temperature
monitoring (with interrupt messages) protects against thermal damage caused by large power dissipation. A
short circuit at one of the outputs can cause an interrupt; the current short circuit status can be scanned via
the µP interface. Pulse mode can be selected for each output, such as for indicator lamps in plugboards, in
order to offload the control software used. The actual switching level of the output can be read out via the µP
interface and be used to check for cable fractures with the pull-up currents. A PWM signal can also be
switched to any selected output. All outputs can be switched off via a mutual disable input e.g. by a processor-
independent watchdog circuit.
An interrupt pipeline which prevents the loss of interrupts allows reliable processing of interrupts using the
applied control software.
With low voltage the voltage monitor resets all registers and in doing so switches off the power output stages.
Diodes protect all inputs and outputs against ESD. The device is also immune to burst transients according
to IEC 1000-4-4 (4 kV; previously IEC 801-4).
5 V
5 V
24 V
C1
100 nF
5 V
C2
24 V
ADRESS-
DEKODIERER
31
POE
3.3 ... 10 uF
34
30
VCCD VCCA
C3
C4
100 nF
1
2
3
CSN
WRN
RDN
VB01
IO0
28
29
27
S1
S2
WR
RD
IO1
39
40
41
42
43
A0
A1
A2
A3
A4
100 nF
VB23
IO2
25
26
24
S3
S4
LOWER
IO3
NIBBLE
8
5
A0..A7
38
8
D0
D1
D2
D3
D4
D5
D6
D7
C5
100 nF
VB45
IO4
21
22
20
µP
36
9
IO5
36
10
35
11
C6 100 nF
VB67
IO6
18
19
17
HIGHER
NIBBLE
IO7
8
D0..D7
LA1
LA2
LA3
REL1
7
6
RESN
INTN
KONTROLL-
iC-JRX
REGISTER
INT
PLCC44
TEST
15
BLFQ CLK
GNDD GNDA PGND
RES
5 V
4
5
12 16 23
RESET
CONTROLLER
5 V
1.25 MHz
Typical application circuit
ICHAUS [ IC-HAUS GMBH ]
