iC-JRX
µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS
Rev A1, Page 8/23
Control Word 5 (PWM enable and pin selection)
Add.: 14
reset entry: 00h
0
Bit
7
-
6
-
5
-
4
3
2
1
Name
PWMEN
PWMPN
PWM
ADR(2)
PWM
PWM
ADR(1)
ADR(0)
Bit 4
0
1
PWM "DISABLED"
(r)
(r)
PWMEN
PWM "ENABLED": the output selected with PWMADR receives the PWM signal. The relevant current
sources are switched off.
Bit 3
0
1
PWM signal active low
PWM signal active high
PWMPN
Bit 2..0
PWMADR2
PWMADR1
PWMADR0
Selected I/O pin
PWMADR 2..0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
IO0 (control line PSEL0= 1)
IO1
IO2
IO3
IO4
IO5
IO6
IO7
PWM Register
Add.: 15
reset entry: 00h
Bit
7
6
5
4
3
2
1
0
Name
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0
Bit 7..0
'00'h
'...'h
Output stage "OFF" (continously)
(r)
PWM7..0
Duration of the PWM signal in steps of 16× t(CLK)
Output stage "ON" (continously)
'FF'h
The PWM register determines the pulse length of the PWM signal. Output selection and enable are set via
Control Word 5.
ICHAUS [ IC-HAUS GMBH ]
