iC-GF
TRANSCEIVER
Rev C1, Page 19/26
load time cannot be changed (cf. Electrical Character- would be a contrasting pulse, forcing the selected line
istics No. 301), only the average value (duty cycle).
to a state different than the current one (short-circuit).
DUTYC(1:0)
Adr 0x03; Bit (3:2)
Duty cycle of 1:4
R/W 10
00
01
10
11
Duty cycle of 1:8
Duty cycle of 1:10
Duty cycle of 1:15
Table 21: Overload detection duty cycle
Spread spectrum oscillator
In SPI mode the spread spectrum operation can be
disabled with the register ENRND.
ENRND
Adr 0x02; Bit (4)
Spread spectrum disabled
Spread spectrum enabled
R/W 1
Figure 10: Communication request pulse genera-
tion
0
1
Table 22: Spread spectrum oscillator
Bit ENSCR enables the communication request func-
tion. By default, communication requests are detected
at channel 1 (Q1 connected to CFI). For detection at
channel 2, the bit SCR2 must be set. As shown in
Figure 11, a communication request is acknowledged
when its duration is inside a defined window (cf. Elec-
trical Characteristics No. 303). The relevant thresh-
old voltages are given in the Electrical Characteristics
Nos. 801, 802, 803 and 804. The example in Table 26
shows channel 1 used for communication request.
Pull-down currents
In SPI mode the pins NCS and SCLK do only have a
pull-down current.
Undervoltage signalling
Undervoltage at VBO, VCC or VCC3 is signalled in
the status register UVD. A valid undervoltage event is
signalled for the duration of the undervoltage situation
resp. for at least 35 ms (Electrical Characteristics No.
405). Only during this time, the undervoltage event is
signalled in the status register UVD. It will also be sig-
nalled at pin NDIAG. Any confirmed undervoltage situ-
ation at VCC or VCC3 will reset the configuration reg-
ister which will also be signalled in the status register
INITR; this bit is cleared when read. The SPI interface
is not affected by any of the undervoltage events and
is still operable, provided that the supply level at VCC
is high enough.
ENSCR
Adr 0x02; Bit (6)
R/W 0
0
1
Communication request disabled
Communication request enabled
Table 24: Enable communication request
UVD(1:0)
Adr 0x04; Bit (7:6)
R 00
00
01
10
11
No undervoltage detected
Undervoltage at VCC or VCC3
Undervoltage at VBO
SCR2
Adr 0x02; Bit (5)
R/W 0
0
1
Communication request in channel 1
Communication request in channel 2
Undervoltage at VBO and VCC/VCC3
Table 25: Communication request channel select
Table 23: Undervoltage detection
Communication requests
The communication request function (IO-Link wake- An acknowledged communication request will be
up) allows interrupt signal generation by means of a logged in the status bit SCR and signalled at pin
well defined short-circuit on one of the switching chan- NDIAG. The communication request is not affected by
nels. This requires the relevant switching channel (Q1 the output disabling (neither by pin nor register OEN),
or Q2) to be connected to the feedback channel in- but is disabled if the configuration in QCFGx is set to
put CFI (see Figure 10). The communication request "00".
ICHAUS [ IC-HAUS GMBH ]
