IBMN312164CT3
IBMN312804CT3
IBMN312404CT3
Preliminary
128Mb Synchronous DRAM - Die Revision B
Current State Truth Table (Part 1 of 3)(See note 1)
Command
Current State
Action
Notes
CS RAS CAS WE BS0,BS1
A11 - A0
Description
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
H
L
OP Code
Mode Register Set
Set the Mode Register
2
X
BS
BS
BS
BS
X
X
X
Auto or Self Refresh Start Auto or Self Refresh
2, 3
L
H
H
L
Precharge
No Operation
L
H
L
Row Address Bank Activate
Activate the specified bank and row
Idle
Row Active
Read
H
H
H
X
L
Column
Write w/o Precharge ILLEGAL
Read w/o Precharge ILLEGAL
4
4
L
H
H
X
L
Column
H
X
L
X
X
No Operation
No Operation
X
Device Deselect
Mode Register Set
No Operation or Power Down
ILLEGAL
5
OP Code
L
L
H
L
X
BS
BS
BS
BS
X
X
X
Auto or Self Refresh ILLEGAL
L
H
H
L
Precharge
Precharge
ILLEGAL
6
4
L
H
L
Row Address Bank Activate
H
H
H
X
L
Column
Write
Start Write; Determine if Auto Precharge 7, 8
L
H
H
X
L
Column
Read
Start Read; Determine if Auto Precharge 7, 8
H
X
L
X
X
No Operation
Device Deselect
Mode Register Set
No Operation
No Operation
ILLEGAL
X
OP Code
L
L
H
L
X
BS
BS
BS
BS
X
X
X
Auto or Self Refresh ILLEGAL
Precharge Terminate Burst; Start the Precharge
L
H
H
L
L
H
L
Row Address Bank Activate
ILLEGAL
4
H
H
H
X
L
Column
Write
Terminate Burst; Start the Write cycle
8, 9
L
H
H
X
L
Column
Read
Terminate Burst; Start a new Read cycle 8, 9
Continue the Burst
H
X
L
X
X
No Operation
Device Deselect
Mode Register Set
X
Continue the Burst
OP Code
ILLEGAL
L
L
H
L
X
BS
BS
BS
BS
X
X
X
Auto or Self Refresh ILLEGAL
Precharge Terminate Burst; Start the Precharge
ILLEGAL
Terminate Burst; Start a new Write cycle 8, 9
L
H
H
L
L
H
L
Row Address Bank Activate
4
Write
H
H
H
X
Column
Write
L
H
H
X
Column
Read
Terminate Burst; Start the Read cycle
Continue the Burst
8, 9
H
X
X
X
No Operation
Device Deselect
X
Continue the Burst
1. CKE is assumed to be active (high) in the previous cycle for all entries. The Current State is the state of the bank that the Com-
mand is being applied to.
2. All Banks must be idle; otherwise, it is an illegal action.
3. If CKE is active (high) the SDRAM will start the Auto (CBR) Refresh operation, if CKE is inactive (low) than the Self Refresh mode
is entered.
4. The Current State refers to only one of the banks. If BS selects this bank then the action is illegal. If BS selects the bank not being
referenced by the Current State then the action may be legal depending on the state of that bank.
5. If CKE is inactive (low) then the Power Down mode is entered; otherwise there is a No Operation.
6. The minimum and maximum Active time (tRAS) must be satisfied.
7. The RAS to CAS Delay (tRCD) must occur before the command is given.
8. Column address A10 is used to determine if the Auto Precharge function is activated.
9. The command must satisfy any bus contention, bus turn around, and/or write recovery requirements.
10. The command is illegal if the minimum bank to bank delay time (tRRD) is not satisfied.
©IBM Corporation. All rights reserved.
06K7582.H03335A
01/01
Use is further subject to the provisions at the end of this document.
Page 31 of 66
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