IBM PowerPRS Q-64G
Packet Routing Switch
Preliminary
3.3.6 Flow Control Flywheels for Grants Carried in Egress Packets .............................................. 36
3.3.6.1 Extended Output Queue Grant Flywheel ........................................................................ 37
3.3.6.2 Output Queue Grant Priority Flywheel ............................................................................ 37
3.3.6.3 Subport Grant Type/Priority Flywheel ............................................................................. 37
3.3.6.4 Subport Grant Port Flywheel .......................................................................................... 38
3.3.7 Egress Idle Packet Format ..................................................................................................... 39
3.3.8 Egress Data Packet and Control Packet Format ................................................................... 44
3.3.9 Egress Service Packet Format .............................................................................................. 45
3.4 Ingress Flow Control ..................................................................................................................... 47
3.4.1 Output Queue Grants ............................................................................................................. 47
3.4.2 Memory Grants ...................................................................................................................... 48
3.4.3 Multicast Grants ..................................................................................................................... 48
3.4.4 Shared Memory Overrun ....................................................................................................... 49
3.4.5 Flow Control Latency ............................................................................................................. 49
3.4.6 Best-Effort Discard ................................................................................................................. 49
3.4.6.1 Best-Effort Discard Counters .......................................................................................... 50
3.4.6.2 Best-Effort Discard Thresholds ....................................................................................... 50
3.4.6.3 Best-Effort Discard Filters ............................................................................................... 51
3.5 Egress Flow Control ..................................................................................................................... 52
3.5.1 Send Grants ........................................................................................................................... 52
3.5.2 Send Grant Antistreaming ...................................................................................................... 52
3.5.3 Credit Table ........................................................................................................................... 53
3.6 Subport Flow Control .................................................................................................................... 53
3.7 Flow Control Information Summary ............................................................................................ 54
3.8 Packet Reception .......................................................................................................................... 54
3.8.1 Data Packet Reception .......................................................................................................... 55
3.8.2 Control and Service Packet Reception .................................................................................. 55
3.9 Packet Transmission .................................................................................................................... 56
3.9.1 Output Port Servicing ............................................................................................................. 56
3.9.2 Control and Service Packet Transmission ............................................................................. 56
3.9.3 Idle Packet Transmission ....................................................................................................... 56
3.9.4 Look-Up Table ....................................................................................................................... 56
3.10 Side Communication Channel ................................................................................................... 57
3.11 Switchover Support .................................................................................................................... 57
3.11.1 Scheduled Switchover Process ........................................................................................... 58
3.11.1.1 Phase 1: Rerouting Traffic to One Switch Plane ..................................................... 59
3.11.1.2 Phase 2: Modifying the Load-Balancing Configuration .......................................... 60
3.11.1.3 Phase 3: Resuming Traffic on Both Switch Planes ................................................. 60
4. Programming Interface ............................................................................................. 61
4.1 SHI Instruction Register ............................................................................................................... 61
4.2 SHI Instruction Execution ............................................................................................................. 62
4.3 SHI Parity Checking ...................................................................................................................... 62
4.4 SHI Parity Generation ................................................................................................................... 62
5. Register Descriptions ............................................................................................... 63
5.1 SHI Internal Registers ................................................................................................................... 67
5.1.1 Internal PLL Programming Register ....................................................................................... 67
5.1.2 Internal PLL Status Register .................................................................................................. 67
Contents
prsq-64g.01TOC.fm
December 20, 2001
Page 4 of 199