IBM3009K2672
IBM SONET/SDH Framer
CLK clock cycle wide. It is used to synchronize the data arriving at the TXTB#DATA(7:0) inputs of the
SONET/SDH framer if transmit retiming is not performed. Functional Relationship of the Transmit Telecom
Bus Signals shows the relationship between the Input Telecom Bus Data and the TXCFRM signal. The
EFRM control bit enables the TXCFRM pulse to come out one cycle earlier to allow more time for the
device(s) transmitting on the Telecom Bus to supply the C11 byte (the old numbering scheme is used
throughout; this is the J0 byte in the new numbering scheme).
Functional Relationship of the Transmit Telecom Bus Signals
Transmit retiming is not performed. Subframe 1 is shown.
tCYC
TXCCLK
(Output)
TXCCLK
(Output)
TXCFRM
(Output)
t
0 < t < (3 x tCYC-22)ns
TXTB#CLK
(Input)
C11
J1
TXTB#DATA(7:0)
(Input)
TOH
TXTB#SPE
(Input)
TXTB#C1J1
(Input)
Notes:
1. Parity and Failure outputs are not shown.
2. TXTB#C1J1 does not need to be aligned under the C11 byte in the TXTB#DATA(7:0) signal.
It can be in any slot provided that the FRM_SLT_SEL(1:0) bits in the OT#Conf11 registers are set
accordingly, where # = 1-4. Furthermore, if retiming is not enabled, the J1 pulse does not need
to be present.
3. The TXTB#SPE signal does not need to be present if retiming is not performed. In that case,
the TXTB#C1J1 signal needs to contain only one pulse, while the TXTB#SPE input is tied low.
4. The relationship between the J1 and the SPE signals is shown for illustration purposes only,
and will be a function of pointer offset.
5. When retiming is enabled, the J1 and C1 pulses in the TXTB#C1J1 signal are mandatory.
The transmit Telecom Bus clock input (TXTB#CLK where # = 1-4) is used to clock the transmit Telecom Bus
input signals into the SONET/SDH framer. It must be frequency synchronous with the TXCCLK clock if trans-
mit retiming is not performed. Also, no phase relationship is required between TXCCLK and the TXTB#CLK
clocks. It should be noted that when an STM-4c/STS-12c payload is being processed, so that the four trans-
mit Telecom Bus interfaces act as a single 32-bit wide interface, all four TXTB#CLK inputs must all be identi-
cal.
Each Telecom Bus port has an 8-bit wide data bus that accepts byte-aligned data from the transmitting Tele-
com Bus device. The data on this bus must have proper alignment with respect to the transmit reference
frame pulse TXCFRM if transmit retiming is not performed. Functional Relationship of the Transmit Telecom
Bus Signals on page 21 shows the required alignment when transmit retiming is not performed. Note that the
TXTB#CLK signal must be frequency synchronous with TXCCLK if transmit retiming is not performed. How-
ssframer.01
8/27/99
Block Diagram and Block Descriptions
Page 21 of 279
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