IBM3009K2672
IBM SONET/SDH Framer
clock edges 20-22. The TXMSI signal is sampled low on clock edge 22, while TXEOFI is sampled high. This
means that the last byte of the block of frame data is in the LSB of that word. A word of fill is present in clock
edge 23. There can be any number of fill words between frames in a chunk. However, a frame must always
start on the MSB of a word. Furthermore, if a block of frame data ended in a chunk being transferred across
PHY X, and that chunk ended before another block of frame data started, then the start of the next block of
frame data across PHY X must start in the first word of the next chunk transferred across PHY X. A new block
of frame data begins transfer across PHY M on clock edge 24.
Note: The TXABTO pin indicates when a transmit FIFO has underflowed during the middle of the transfer of
the “HDLC-like” frame. In MPHY mode, if a transmit ACB FIFO underflow occurs in a PHY, say PHY N, while
PHY M is being accessed, the TXABTO indication for PHY N will not be output until PHY N is selected. When
an abort condition occurs, a 7D7E H sequence is inserted at the point in the broken frame where the FIFO
underflow occurred. The rest of the frame data after the FIFO underflow occurred is ignored. If a transmit
FIFO underflow occurs when a frame is not being transferred, then flags (7E H) are inserted into the data
stream until a new frame is transmitted.
The format of the data on RXUDATA(15:0), and the control signals used, vary with the mode as selected by
control bits. In transparent mode, the data in the SONET/SDH payload is extracted and optionally descram-
bled and output on the RXUDATA(15:0) bus. In transparent mode, only chunks are passed across the inter-
face; FCS processing and frame delineation are not performed. Therefore, the RXSOFO, RXEOFO, RXMSO,
and RXFCSEO pins are not used for frame delineation purposes. However, the RXABTO, RXMSO,
RXSOFO, and RXEOFO signals are used in conjunction with each other to indicate receive ACB FIFO over-
flow, illegal sequence detection, and for signaling recovery from reset. They also indicate when the PPP block
is initially enabled. RXCLAV(0) functions normally as a chunk available / valid data and controls indication. If
no FCS processing is selected (as opposed to transparent mode), the destuffed frame data is output on the
data bus minus the frame delimiting and inter-frame flags. It should be noted that, if an FCS is present in the
frame, it is also output on the data bus. The control signals function normally with the exception that the
RXFCSEO signal is not operational. If 16-bit or 32-bit FCS processing is selected, the destuffed frame data is
output on the data bus minus the frame delimiting and inter-frame flags. The FCS is not discarded and is out-
put on the data bus. RXSOFO and RXEOFO are used to indicate the start and end of a frame, respectively.
RXMSO is asserted with RXEOFO to indicate that the end of the frame is in the MSB of the current word.
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Block Diagram and Block Descriptions
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