IBM3009K2672
IBM SONET/SDH Framer
ever, any phase relationship may exist between TXCCLK and TXTB#CLK, as long as the C11 byte is clocked
into the SONET/SDH framer by the TXTB#CLK signal no later than 3 x 51.44 - 22 ns after the occurrence of
the rising edge of TXCCLK that is coincident with TXCFRM being high as shown by the parameter in Func-
tional Relationship of the Transmit Telecom Bus Signals on page 21.
Control bit EFRM allows the TXCFRM pulse to come out one cycle earlier as indicated by the dashed line in
Functional Relationship of the Transmit Telecom Bus Signals on page 21. This will allow an extra clock cycle
for a device on the Telecom Bus to put out its C11 byte if need be. It is extremely important to note that the
C11 byte must be clocked into the SONET/SDH framer within the window defined by Functional Relationship
of the Transmit Telecom Bus Signals on page 21 regardless of whether or not the TXCFRM pulse comes out
one cycle earlier (i.e., the window is always measured with respect to the normal position of TXCFRM when
the EFRM control bit is set to ‘0’).
The TXTB#DATA(7:0) stream must contain valid Pointer Bytes (including concatenation indication) when the
SONET/SDH framer is not performing transmit retiming. All other TOH bytes are overwritten by the
SONET/SDH framer. The device transmitting on the Telecom Bus must also supply the POH regardless of
whether retiming is enabled or not. The SONET/SDH framer will not perform any transmit POH processing
while in the Telecom Bus mode of operation. Even if ring port operation is enabled while in Telecom Bus
mode, the SONET/SDH framer will ignore POH information from the mating SONET/SDH framer.
It should be noted that when an STM-4c/STS-12c payload is being processed, so that the four transmit Tele-
com Bus interfaces act as a single 32-bit wide interface, the TXTB1DATA(7:0) contains the MSB of the 32-bit
double word of data, i.e., TXTB1DATA(7) is the first bit transmitted while TXTB4DATA(0) is the last bit trans-
mitted.
While transmit retiming is disabled, and the TXTB#SPE input is low, the corresponding C1 pulse in the
TXTB#C1J1 signal is used as a slot identifier rather than a C1 byte identifier. A set of control bits
FRM_SLT_SEL(1:0) in the OT#Conf11 registers are used to tell the SONET/SDH framer which slot the C1
pulse is located in. Functional Relationship of the Transmit Telecom Bus Signals on page 21 shows an exam-
ple. When transmit retiming is enabled, the pulses on the TXTB#C1J1 signal pin must be both present and
coincident with the C11 and J1 bytes in the TXTB#DATA(7:0) signal. It should be noted that when an STM-
4c/STS-12c payload is being processed, so that the four transmit Telecom Bus interfaces act as a single 32-
bit wide interface, all four TXTB#C1J1 inputs must be identical.
The transmit Telecom Bus SPE input (TXTB#SPE, #=1-4) should be low during TOH time slots and should be
high during SPE time slots in each subframe. This includes cases where pointer adjustments are performed
and the VC-4 needs to be adjusted about the H3 bytes. For example, the H3 bytes become payload bytes
during the frame in which a pointer decrement occurs; therefore, the TXTB#SPE signal should be high coinci-
dent with the H3 bytes. Also, in the frame where a pointer increment occurs, the three bytes after the H3
bytes become stuff, therefore the TXTB#SPE signal must be low for those bytes. The TXTB#SPE signal can
be tied low if no retiming is done and the TXTB#C1J1 signal has only one pulse. It should be noted that when
an STM-4c/STS-12c payload is being processed, so that the four transmit Telecom Bus interfaces act as a
single 32-bit wide interface, all four TXTB#SPE inputs must be identical.
The Telecom Bus checks the value of the transmit Telecom Bus parity input (TXTB#PAR) against an inter-
nally calculated value. The parity calculations that the SONET/SDH framer performs can be configured on a
per Telecom Bus basis through the use of the PAR_EVEN, PAR_EN, and PAR_FULL control bits in the
OT#Conf11 registers. If the TXTB#PAR signal indicates a different value than the SONET/SDH framer
expects, the SONET/SDH framer will indicate an alarm through the PAR_ERR event bits in the OT#IRQ2 reg-
isters. Interrupt mask bits for the PAR_ERR event bits are provided in the OT#M_IRQ2 registers. The
PAR_ERR interrupt mask bits will enable an interrupt request to be generated if its corresponding PAR_ERR
event bit is set. The parity is checked on a per Telecom Bus basis regardless of whether or not the Telecom
Bus interfaces work individually or as a single bus.
Block Diagram and Block Descriptions
Page 22 of 279
ssframer.01
8/27/99
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