IBM3009K2672
IBM SONET/SDH Framer
Local (GPPINT) Configuration Register
ConfGP1: The bits of this local configuration register control the resetting of complete registers upon read
access (“clear-register” option).
For each bit position: 0: No action upon read access
1: The corresponding register is reset upon read access (DEFAULT)
7.1: ConfGP1 [384A H]
Signal Name
Reserved
Bits
0
Access
R/W
Default
1
Description
Reserved
Clear-bit for register SIMStat. When this bit is set to a ‘1’ the bits in the
SIMStat register clear on read. When set to a ’0’, the bits in the SIMStat
register do not clear on read. For either setting of this bit, the bits in the
SIMStat register can be individually cleared by writing a ‘1’ to them, pro-
vided that the alarm condition is removed.
SIMStat
HShake
1
2
R/W
R/W
1
1
Clear-bit for registers HShake1-5. When this bit is set to a ‘1’ the bits in the
HShake1-5 registers clear on read. When set to a ’0’, the bits in the
HShake1-5 registers do not clear on read. For either setting of this bit, the
bits in the HShake1-5 registers can be individually cleared by writing a ‘1’
to them, provided that the alarm condition is removed.
Clear-bit for registers ClkStat1-4. When this bit is set to a ‘1’, the bits in the
ClkStat1-4 registers clear on read. When set to a ’0’, the bits in the
ClkStat1-4 registers do not clear on read. For either setting of this bit, the
bits in the ClkStat1-4 registers can be individually cleared by writing a ‘1’ to
them, provided that the alarm condition is removed.
ClkStat
3
R/W
R/W
1
Reserved
7:4
1111
Reserved
IBM Internal Use Register
This read-only register is for IBM internal use only.
8.1: VPD [3850 H]
Signal Name
Bits
Access
Default
Description
TESTSITE
SMART
4:0
7:5
R
R
000vv
100
This register is for IBM internal use only.
This register is for IBM internal use only.
Register Descriptions
Page 128 of 279
ssframer.01
8/27/99
IBM [ IBM ]
