IBM3009K2672
IBM SONET/SDH Framer
The transmitted G1 bytes can be generated from local alarm conditions or can be derived from the ring port
when the RING control bit is set to ‘1’. The F2, F3, H4, K3, and N1 bytes can be written to the on-chip RAM by
the microprocessor for transmission. These values are static and are not acted upon by the SONET/SDH
framer’s transmit logic. Path AIS can be forced in the transmit direction under software control or by an exter-
nal pin (TXTB#FAIL).
Receive Higher-Order Path Termination (HPT) Layer Options
The SONET/SDH framer provides the HPT functions when the UTOPIA or the UTOPIA Level 2+ interface is
being used to interface PPP or ATM payloads. POH processing is not performed when the Telecom Bus is
used.
All POH bytes are stored in on-chip RAM where they can be observed by the microprocessor. Either receive
64-byte free form or 16-byte ITU-T G.831-style messages can be received. The received 16-byte J1 message
can be compared with a 16-byte microprocessor-written J1 compare message in the receive GRA. A Trace
Identifier Mismatch alarm (HPTIM) is raised if no match occurs. 16-bit counters are provided for counting B3
errors, B3 block errors and Path REI. These counters have programmable threshold overstep registers that
cause maskable interrupts to be generated when the counter value oversteps the programmed threshold. The
Path REI counter regards values of 08 H or greater as a count of 0. The B3 block error counter increments by
one each time an errored B3 byte is received, no matter how many bits are errored. The Unequipped defect
(UNEQ) detection is performed on the received C2 bytes. If the received C2 bytes are set to ’0’ for five con-
secutive frames, the UNEQ interrupt request bit is set to a ‘1’. If the received C2 byte is not ’0’ for five consec-
utive frames, the UNEQ will be terminated. Path Signal Label mismatch detection is performed against a
microprocessor-written expected C2 byte and an internal 01 H value. If a mismatch occurs between the
received C2 byte and either the expected C2 byte or the internal 01 H value, the SLM interrupt request bit
becomes set to a ‘1’. It should be noted that an unequipped condition does not cause the SLM interrupt
request bit to go active.
Transmit/Receive Lower-Order Path Adaptation Functions
In ATM/PPP mode, the transmit ATM/PPP streams are mapped into a C-4 or C-4-4c and the receive
ATM/PPP streams are extracted from the C-4, or C-4-4c per [G.707] and [RFC-1619].
Operation
ssframer.01
8/27/99
Page 102 of 279