Datasheet
PowerPC 970FX RISC Microprocessor
Figure 3-6. Post-IAP Eye Opening
V
/2
BIT
V
EYE
V
REF-SSB
V
EYE
V
/2
BIT
T
EYE
T
BIT
The reference level for VEYE is VREF-SSB. The horizontal (TEYE) eye opening is a function of the bit time (TBIT) and
the earliness of the bus clock transition relative to the slowest data signal.
Table 3-14. Eye-Size Requirements
Eye
Requirement
(ps)
Processor to ProcessorCore
V
EYE
(Minimum)
Bit Rate (Mbps)
Step Time (ps)
Bit Time (ps)
Eye/Bit Time
Bus Ratio
(MHz)
400
450
500
500
666
666
866
1066
3
3
3
2
3
2
2
2
1200
1350
1500
1000
1998
1332
1732
2132
31.9
31.9
31.9
31.9
27.8
31.9
31.9
26.0
863
797
744
744
605
625
544
465
2500
2222.2
2000
34.5%
34.5%
37.2%
37.2%
40.3%
41.6%
47.1%
49.6%
150 mV
150 mV
150 mV
150 mV
150 mV
150 mV
150 mV
150 mV
2000
1501.5
1501.5
1154.7
938.1
Version 2.5
Electrical and Thermal Characteristics
Page 33 of 78
March 26, 2007
IBM [ IBM ]
