Datasheet
PowerPC 970FX RISC Microprocessor
3.7 Asynchronous Output Specifications
This section describes the asynchronous outputs and bidirectional signals. Timing information is not provided
because these signals are launched by the internal processor clock.
Table 3-18, Table 3-19, and Table 3-20 list the asynchronous outputs and bidirectionals (BiDi) signals.
Table 3-18. Asynchronous Type Output Signals
Pin
Description
Comment
To service processor
Pin
ATTENTION
QREQ
Attention
Quiesce request
AD12
AB12
N19
Power management
Debug only
TRIGGEROUT
Note: There is no reference to SYSCLK because this output is launched by the (internal) processor clock.
Table 3-19. Asynchronous Open Drain Output Signals
Pin
Description
I C interface go
Comment
Arbitration I C and JTAG
Pin
2
2
I2CGO
N22
Notes:
The rise and fall times are measured between the 20% to 80% points of the input signal swing.
There is no reference to SYSCLK because this output is launched by the (internal) processor clock.
Pull-up resistor = 10 kΩ
Table 3-20. Asynchronous Open-Drain Bidirectional Signals
Pin
Description
Comment
Pin
CHKSTOP
Checkstop signal input/output
R20
Notes:
There is no reference to SYSCLK because this output is launched by the (internal) processor clock.
Pull-up resistor = 10 kΩ
Electrical and Thermal Characteristics
Page 36 of 78
Version 2.5
March 26, 2007