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IBM25PPC970FX6UB186ET 参数 Datasheet PDF下载

IBM25PPC970FX6UB186ET图片预览
型号: IBM25PPC970FX6UB186ET
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 64-Bit, 1600MHz, CMOS, CBGA576, 25 X 25 MM, 1 MM PITCH, CERAMIC, BGA-576]
分类和应用: 时钟外围集成电路
文件页数/大小: 78 页 / 3525 K
品牌: IBM [ IBM ]
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Datasheet  
PowerPC 970FX RISC Microprocessor  
Table 5-8. Input/Output Signal Descriptions (Page 4 of 4)  
Pin Name  
Width  
1
In/Out  
In  
System/Debug Function  
System: time base enable.  
Notes  
TBEN  
TCK  
JTAG: test clock that is separate from the system clock. Controls all  
test access port functions.  
1
1
In  
In  
2
2
JTAG: serial input used to feed test data and test access port instruc-  
tions.  
TDI  
JTAG: Serial output used to extract data from the chip under test con-  
trol.  
TDO  
1
1
1
Out  
In  
THERM_INT  
TMS  
System: external thermal interrupt when low.  
JTAG: Select used to control the operation of the JTAG state  
machine.  
In  
TRIGGERIN  
1
1
1
In  
Out  
In  
External trigger to start trace collection.  
11  
TRIGGEROUT  
TRST  
Signal that indicates that internal trace collection has begun.  
JTAG: asynchronous reset for the JTAG state machine.  
Notes:  
1. These are test signals for factory use only and must be pulled up to OV for normal processor operation.  
DD  
2
2. For I C or JTAG operation, the TCK and TDI signals must be pulled down to ground with a 10 kΩ resistor. See Section 3.10.3 on  
page 43.  
3. Bus ratios 8:1 and 16:1 are not supported for PI Input functionality.  
4. These are test signals for factory use only and must be pulled down to GND for normal processor operation.  
5. This signal should not be connected.  
6. These pins can be used to measure on-chip voltage drop and noise. They should be connected to a backside probe point  
immediately behind the module. They should not be connected to GND and V planes.  
DD  
7. BiDi = bidirectional. OD = open drain.  
8. Using the 4:1 or 12:1 ratio with multiplier of 12 limits the use of power tuning to (frequency)/2.  
9. The PLL_MULT and PLL_RANGE(1:0) bits can be overwritten by JTAG commands and the BUS_CFG bits can be changed by  
SCOM commands during the POR sequence. See the PowerPC 970FX Power On Reset Application Note for more details  
10. Must be pulled down with a 10 kΩ resistor to GND.  
11. The TRST signal must be pulled up to OV with a 10 kΩ resistor.  
DD  
System Design Information  
Page 74 of 78  
Version 2.5  
March 26, 2007  
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