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IBM25PPC750L-GB500AD2R 参数 Datasheet PDF下载

IBM25PPC750L-GB500AD2R图片预览
型号: IBM25PPC750L-GB500AD2R
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 500MHz, CMOS, CBGA360,]
分类和应用: 外围集成电路
文件页数/大小: 54 页 / 1135 K
品牌: IBM [ IBM ]
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PowerPC 740 and PowerPC 750 Microprocessor  
CMOS 0.20 µm Copper Technology, PID-8p, PPC740L and PPC750L, dd3.2  
Overview  
The 750 is targeted for high performance, low power systems and supports the following power management  
features: doze, nap, sleep, and dynamic power management. The 750 consists of a processor core and an  
internal L2 Tag combined with a dedicated L2 cache interface and a 60x bus. The L2 cache is not available  
with the 740.  
Figure 1 shows a block diagram of the 750.  
Figure 1. 750 Block Diagram  
Control Unit  
Instruction Fetch  
Branch Unit  
Completion  
32K ICache  
BHT /  
BTIC  
System  
Dispatch  
Unit  
GPRs  
FPRs  
FXU2  
LSU  
FPU  
FXU1  
Rename  
Buffers  
Rename  
Buffers  
32K DCache  
L2 Tags  
L2 Cache  
BIU  
60X  
BIU  
9/6/2002  
Version 2.0  
Page6  
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