PowerPC 740 and PowerPC 750 Microprocessor
CMOS 0.20 µm Copper Technology, PID-8p, PPC740L and PPC750L, dd3.2
Electrical and Thermal Characteristics
DC Electrical Characteristics
The 750 60x bus power supply can be either 3.3V, 2.5V, or 1.8V nominal; likewise, the L2 power supply can
be either 3.3V, 2.5V, or 1.8V nominal. See the pinout listing for more information
Absolute Maximum Ratings See Notes
Characteristic
Symbol
VDD
Value
Unit
V
Core supply voltage
PLL supply voltage
L2 DLL supply voltage
60x bus supply voltage
- 0.3 to 2.2
- 0.3 to 2.2
- 0.3 to 2.2
- 0.3 to 3.6
- 0.3 to 2.8
- 0.3 to 2.1
- 0.3 to 3.6
- 0.3 to 3.6
- 0.3 to 2.8
- 0.3 to 2.1
- 55 to 150
AVDD
V
L2AVDD
OVDD(3.3V)
OVDD(2.5V)
OVDD(1.8V)
L2OVDD
VIN(3.3V)
VIN(2.5V)
VIN(1.8V)
TSTG
V
V
L2 bus supply voltage
Input voltage
V
V
Storage temperature range
°C
Note:
1. Functional and tested operating conditions are given in Table ”Recommended Operating Conditions,” below. Absolute maximum ratings are stress rat-
ings only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause permanent
damage to the device.
2. Caution: VIN must not exceed OVDD by more than 0.3V at any time, including during power-on reset. This is a DC specification only. VIN overshoot tran-
sients up to OVDD+1V, and undershoots down to GND-1V (both measured with the 740 in the circuit) are allowed for up to 5ns.
3. Caution: OVDD must not exceed VDD/AVDD by more than 2.0V at any time during normal operation. On power up and power down, OVDD is allowed to
exceed VDD/AVDD by up to 3.3V for up to 20 ms, or by up to 2.5V for 40 ms. Excursions beyond 40 ms or 3.3V are not allowed.
4. Caution: VDD/AVDD must not exceed OVDD by more than 0.4V during normal operation. On power up and power down, VDD/AVDD is allowed to exceed
OVDD by up to1.0V for up to 20 ms, or by up to 0.7V for 40 ms. Excursions beyond 40 ms or 1.0V are not allowed.
9/6/2002
Version 2.0
Page10
IBM [ IBM ]
