PowerPC 750 SCM RISC Microprocessor
PID8p-750
Preliminary Copy
The L2CLK_OUT timing diagram is shown in Figure 6.
Figure 6. L2CLK_OUT Output Timing Diagram
L2 SIngle-Ended Clock Mode
22
23
VM
VM
VM
VM
VM
VM
VM
VM
VM
L2CLK_OUTA
L2CLK_OUTB
L2SYNC_OUT
VM = Midpoint Voltage Midpoint voltage (VM) is 1.4v for (2OVdd) in 3.3v. For all other IO modes, VM=(2oVdd/2).
L2 Differential Clock Mode
22
23
L2OVDD
GND
L2CLK_OUTB
L2CLK_OUTA
VM
VM
VM
VM
VM
VM
L2SYNC_OUT
VM = Midpoint Voltage Midpoint voltage (VM) is 1.4v for (2OVdd) in 3.3v. For all other IO modes, VM=(2oVdd/2).
Page 16
Version 2.0
Datasheet
9/30/99