Datasheet
IBM PowerPC 750GX RISC Microprocessor
DD1.X
Table 5-6. Input/Output Usage (Continued)
Input/Output with
Internal
Pullup Resistors
Required
External
Resistor
750GX Signal
Name
Input/
Output
Active Level
Usage Group
JTAG
Level Protect
Comments
50 µa @ 2.5 V
25 µa @ 1.8 V
(the pullup current for th
nal resistor)
Internal
enabled
TRST
Low
Input
Enabled high
TS
Low
High
High
—
Input/Output
Output
Address Start
Transfer Attributes
Transfer Attributes
Power Supply
Keeper
Keeper
Keeper
5 K Ω
Pullup required to OV
DD
TSIZ[0:2]
TT[0:4]
Input/Output
—
V
DD
WT
Low
Output
Transfer Attributes
Keeper
Notes:
1. Depends on the system design. The electrical characteristics of the 750GX do not add additional constraints to the system design, so whatever is d
depend on the system requirements.
2. HRESET, SRESET, and TRST are signals used for RISCWatch to enable proper operation of the debuggers. Logical AND gates should be placed
and the IBM PowerPC 750GX RISC Microprocessor (see Figure 5-6 on page 61).
3. The 750GX provides protection from meta-stability on inputs through the use of a “keeper” circuit on specific inputs (see Section 5.9 on page 69 for
description).
4. If a system design requires a signal level to be maintained while not being actively driven, an external resistor or device must be used (keepers assu
inputs but do not guarantee a level).
5. The 750GX does not require external pullups on address and data lines. Control lines must be treated individually.
6. Mode Select/Control pins require the proper state at HRESET to configure the operating mode of the processor (see Table 5-10, Summary of Mode
System Design Information
Page 60 of 73
750GX_ds_body.fm SA14-2765-02
September 2, 2005
IBM [ IBM ]
