Datasheet
IBM PowerPC 750GX RISC Microprocessor
DD1.X
Figure 3-8 provides the JTAG clock input timing diagram.
Figure 3-8. JTAG Clock Input Timing Diagram
1
2
2
TCK
3
V
V
V
M
M
M
3
V
= Midpoint Voltage (OV /2)
DD
M
Figure 3-9 provides the TRST timing diagram.
Figure 3-9. TRST Timing Diagram
TRST
5
Figure 3-10 provides the boundary-scan timing diagram.
Figure 3-10. Boundary-Scan Timing Diagram
TCK
7
6
Data Inputs
Input Data Valid
8
Data Outputs
Output Data Valid
9
Data Outputs
750GX_ds_body.fm SA14-2765-02
September 2, 2005
Electrical and Thermal Characteristics
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