Datasheet
IBM PowerPC 750GX RISC Microprocessor
DD1.X
Figure 3-7. Output Timing Diagram for IBM PowerPC 750GX RISC Microprocessor
V
V
M-SYSCLK
V
M-SYSCLK
M-SYSCLK
SYSCLK
13
14
15
All Outputs
(Except TS,
ARTRY)
12
V
V
M
M
13
14
15
13
TS
V
M
16
ABB, DBB
20
19
18
17
ARTRY
High Level
Hi-Z
Low Level
Note: SYSCLK V as defined in Section 3.3, Clock AC Specifications, on page 18.
M
Output V as defined in Figure 3-6, Output Valid Timing Definition, on page 24.
M
750GX_ds_body.fm SA14-2765-02
September 2, 2005
Electrical and Thermal Characteristics
Page 25 of 73