Data Sheet
Preliminary
PowerPC® 750CXe RISC Microprocessor
Figure 5-4. PowerPC 750CXe Microprocessor Ball Placement
1
g
2
g
3
4
g
5
6
7
8
dh15
g
9
10
dh19
g
11
dh20
g
12
13
dh24
g
14
15
dh28
dh31
a0
16
dh30
a1
17
g
18
a4
19
g
20
g
dh3
vdd
g
dh9
dh6
ovdd
vdd
dh11
dh8
dh7
dh5
dh13
dh12
dh10
ovdd
dh16
dh18
dh17
ovdd
dh23
dh21
dh22
ovdd
dh26
dh27
dh29
ovdd
A
B
C
D
E
F
G
H
J
g
g
dh4
vdd
g
a3
vdd
g
g
g
dh2
ovdd
hreset
vdd
dh1
dh0
dh14
vdd
g
g
dh25
vdd
ovdd
vdd
vdd
g
vdd
a6
a8
a10
a14
g
a5
vdd
vdd
vdd
a2
vdd
ovdd
a9
g
dbwo1
vdd
vdd
a7
a11
a13
a15
tt_1
tt_2
tt_4
tsiz0
pllcfg0 lssd_mode mcp l1_tstclk
pllcfg2
bvsel
g
pllcfg1
pllcfg3
int
sysclk
avdd
ovdd
vdd
ovdd
vdd
ovdd
vdd
vdd
a12
tt_0
tt_3
g
ckstp_in ovdd
ts
sreset
qreq
qack
g
g
g
vdd
vdd
g
K
L
g
g
dbg
tea
artry
ovdd
ovdd
tsiz2
tsiz1
ta
M
br
bg
g
tdo
tdi
vdd
ovdd
trst
vdd
g
vdd
ovdd
a24
vdd
g
aack
a19
a22
ovdd
vdd
g
g
tbst
a16
a18
a20
g
N
P
R
T
ckstp_out
a17
a21
a23
a25
vdd
g
wt
gbl
ci
tms
tck
dl31
ovdd
dl29
g
dl30
vdd
g
vdd
g
vdd
ovdd
dl25
dl22
dl26
dl24
dl23
dl20
ovdd
dl21
dl19
dl18
vdd
dl17
g
ovdd
dl14
dl13
dl15
vdd
g
vdd
g
ovdd
dl9
vdd
dl6
g
ovdd
dl2
a29
a31
dl0
vdd
ovdd
a30
dl1
U
V
W
Y
vdd
dl27
g
vdd
a28
g
a26
g
vdd
dl28
g
g
dl10
dl8
dl4
vdd
a27
g
g
dl16
dl12
dl11
dl7
dl5
dl3
g
g
Note: This view is looking down from above the PowerPC 750CXe placed and soldered on the system board.
1. DBWO multiplexed with L2_TSTCLK function, see Section 6.7.4 on Page 34 for details.
750cxe_DD3.1_Dev_3_gen_mkt.fm.1.5
April 8, 2004
PowerPC 750CXe Dimension and Physical Signal Assignments
Page 21 of 36
IBM [ IBM ]
