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IBM041811QLAB-7 参数 Datasheet PDF下载

IBM041811QLAB-7图片预览
型号: IBM041811QLAB-7
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 64KX18, 3.5ns, CMOS, PBGA119, BGA-119]
分类和应用: 静态存储器内存集成电路
文件页数/大小: 21 页 / 301 K
品牌: IBM [ IBM ]
 浏览型号IBM041811QLAB-7的Datasheet PDF文件第3页浏览型号IBM041811QLAB-7的Datasheet PDF文件第4页浏览型号IBM041811QLAB-7的Datasheet PDF文件第5页浏览型号IBM041811QLAB-7的Datasheet PDF文件第6页浏览型号IBM041811QLAB-7的Datasheet PDF文件第8页浏览型号IBM041811QLAB-7的Datasheet PDF文件第9页浏览型号IBM041811QLAB-7的Datasheet PDF文件第10页浏览型号IBM041811QLAB-7的Datasheet PDF文件第11页  
IBM043611QLAB  
IBM041811QLAB  
Preliminary  
32K X 36 & 64K X 18 SRAM  
Recommended DC Operating Conditions (T =0 to 70°C)  
A
Parameter  
Supply Voltage  
Symbol  
VDD  
Min.  
3.15  
1.14  
REF +0.1  
-0.3  
Typ.  
3.3  
1.4  
Max.  
3.60  
Units  
V
Notes  
1
Output Driver Supply Voltage  
Input High Voltage  
VDDQ  
VIH  
1.6  
V
1
V
V
DDQ + 0.3  
V
1, 2  
1, 3  
1
Input Low Voltage  
VIL  
V
REF -0.1  
V
Input Reference Voltage  
Clocks Signal Voltage  
Differential Clocks Signal Voltage  
Clocks Common Mode Voltage  
Output Current  
VREF  
0.55  
-0.3  
0.70  
0.90  
V
VIN - CLK  
VDIF - CLK  
VCM - CLK  
IOUT  
VDDQ + 0.3  
V
1, 4  
1, 5  
1
0.1  
V
DDQ + 0.6  
V
0.55  
0.90  
8
V
5
mA  
1. All voltages referenced to VSS. All VDD VDDQ and VSS pins must be connected.  
,
2. VIH(Max)DC = VDDQ + 0.3 V, VIH(Max)AC = VDD + 1.5 V (pulse width 4.0ns).  
3. VIL(Min)DC = - 0.3 V, VIL(Min)AC= -1.5 V (pulse width 4.0ns).  
4. VIN  
-CLK  
5. VDIF  
-CLK  
specifies the maximum allowable DC excursions of each differential clock (K, K).  
specifies the minimum Clock differential voltage required for switching.  
Capacitance (T =0 to +70°C, V =3.3 5% + 10% V, f=1MHz)  
A
DD  
Parameter  
Symbol  
CIN  
Test Condition  
VIN = 0V  
Max  
3
Units  
pF  
Input Capacitance  
Data I/O Capacitance (DQ0-DQ35)  
VOUT = 0V  
4
pF  
COUT  
DC Electrical Characteristics (T = 0 to +70°C, V =3.3 ± 5% V)  
A
DD  
Parameter  
Symbol  
Min.  
Max.  
Units  
Notes  
IDD5  
IDD6  
IDD7  
675  
580  
510  
Average Power Supply Operating Current- X36  
mA  
mA  
1
(IOUT = 0, VIN = VIH or VIL, ZZ & SS = VIL)  
IDD5  
IDD6  
IDD7  
590  
500  
440  
Average Power Supply Operating Current - X18  
(IOUT = 0, VIN = VIH or VIL, ZZ & SS = VIL)  
1
1
Power Supply Standby Current  
(ZZ= VIH, All other inputs = VIH or VIL, IOUT = 0)  
ISB  
ILI  
-1  
-1  
25  
+1  
mA  
µA  
µA  
Input Leakage Current, any input  
(VIN = VSS or VDD  
)
Output Leakage Current  
(VOUT = VSS or VDD, DQ in High-Z  
ILO  
+1  
Output “High” Level Voltage (IOH=-6mA @ VDDQ  
Output “Low” Level Voltage (IOL=+6mA @ VDDQ  
)
VDDQ  
VOH  
VOL  
VDDQ  
V
V
2
2
/ 2 + 0.3  
/ 2 + 0.3  
VSS  
)
VDDQ  
/ 2 -0.3  
/ 2 -0.3  
1. IOUT = Chip Output Current.  
2. Minimum Impedance Output Driver.  
©IBM Corporation, 1996. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
03H9040  
SA14-4659-04  
Revised 7/96  
Page 7 of 21  
 
 
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