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IBM0364804PT3B-360 参数 Datasheet PDF下载

IBM0364804PT3B-360图片预览
型号: IBM0364804PT3B-360
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP2-54]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 72 页 / 1201 K
品牌: IBM [ IBM ]
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Discontinued (8/99 - last order; 12/99 - last ship)  
IBM0364804 IBM0364164  
IBM0364404 IBM03644B4  
64Mb Synchronous DRAM - Die Revision B  
Power Down Mode  
In order to reduce standby power consumption, two power down modes are available: Precharge and Active  
Power Down mode. To enter Precharge Power Down mode, all banks must be precharged and the neces-  
sary precharge delay (tRP) must occur before the SDRAM can enter the power down mode. If a bank is acti-  
vated but not performing a Read or Write operation, Active Power Down mode will be entered. (Issuing a  
Power Down Mode Command when the device is performing a Read or Write operation causes the device to  
enter Clock Suspend mode. See the following section.) Once the Power Down mode is initiated by holding  
CKE low, all of the receiver circuits except CKE are gated off. The Power Down mode does not perform any  
refresh operations, therefore the device can’t remain in Power Down mode longer than the Refresh period  
(tREF) of the device.  
The Power Down mode is exited by bringing CKE high. When CKE goes high, a No Operation Command (or  
a Device Deselect Command) is required on the next rising clock edge.  
Power Down Mode Exit Timing  
Tm  
Tm+1  
Tm+2  
Tm+3  
Tm+4  
Tm+5  
Tm+6  
Tm+7  
Tm+ 8  
CLK  
CKE  
t
CK  
t
CES  
NOP  
COMMAND  
NOP  
NOP  
NOP  
NOP  
NOP  
COMMAND  
: “H” or “L”  
©IBM Corporation. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
19L3264.E35855A  
1/28/99  
 
 
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