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IBM0316809CT3D-10 参数 Datasheet PDF下载

IBM0316809CT3D-10图片预览
型号: IBM0316809CT3D-10
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 2MX8, 8ns, CMOS, PDSO44, 0.400 INCH, PLASTIC, TSOP2-44]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 120 页 / 1896 K
品牌: IBM [ IBM ]
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Discontinued (12/98 - last order; 9/99 last ship)  
IBM0316409C IBM0316809C IBM0316169C  
IBM03164B9C  
16Mb Synchronous DRAM-Die Revision D  
Bank Activate Command  
In relation to the operation of a fast page mode DRAM, the Bank Activate command corresponds to a falling  
RAS signal. The Bank Activate command is issued by holding CAS and WE high with CS and RAS low at the  
rising edge of the clock. The bank select address, A11 (sometimes referred to as BS), is used to select the  
desired bank. If BS is low then bank A is activated, if BS is high then bank B is activated. The row address A0  
- A10 is used to determine which row to activate in the selected bank. Only banks A and B within a single  
deck of a 2-High stacked device can be accessed. Simultaneous operation of both decks in a stacked device  
is not allowed, except during Self Refresh.  
The Bank Activate command must be applied before any Read or Write operation can be executed. The  
delay from when the Bank Activate command is applied to when the first read or write operation can begin  
must meet or exceed the RAS to CAS delay time (tRCD). Once a bank has been activated it must be pre-  
charged before another Bank Activate command can be applied to the same bank. The minimum time inter-  
val between successive Bank Activate commands to the same bank is determined by the RAS cycle time of  
the device (tRC). The minimum time interval between interleaved Bank Activate commands (Bank A to Bank B  
and vice versa) is the Bank to Bank delay time (tRRD).  
Bank Activate Command Cycle (CAS Latency = 3, t  
= 3)  
RCD  
T0  
T1  
T2  
T3  
Tn  
Tn+1  
Tn+2  
Tn+3  
CLK  
. . . . . . . . . .  
Bank A  
Col. Addr.  
Bank A  
Row Addr.  
Bank B  
Row Addr.  
Bank A  
Row Addr.  
. . . . . . . . . .  
ADDRESS  
RAS-CAS delay (tRCD  
)
RAS - RAS delay time (tRRD  
)
Write A  
with Auto-  
Precharge  
Bank B  
NOP  
Bank A  
Activate  
Bank A  
Activate  
. . . . . . . . . .  
NOP  
NOP  
NOP  
COMMAND  
Activate  
RAS Cycle time (tRC  
)
: “H” or “L”  
©IBM Corporation. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
08J3348.E35853  
5/98