111
Synchronous DRAM Memory 256Mbit
HY57V561620F(L)T(P) Series
o
DC CHARACTERISTICS II (TA= 0 to 70 C)
Speed
Parameter
Symbol
Test Condition
Unit
Note
5
6
H
Operating
Current
Burst length=1, One bank active
tRC ≥ tRC(min), IOL=0mA
IDD1
110
100
1.0
90
mA
mA
1
Precharge
Standby
Current
in Power Down
Mode
IDD2P
CKE ≤ VIL(max), tCK = 15ns
CKE ≤ VIL(max), tCK = ∞
IDD2PS
IDD2N
1.0
15
mA
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = 15ns
Input signals are changed one time during
2clks. All other pins ≥ VDD-0.2V or ≤ 0.2V
Precharge
Standby
Current
mA
in Non Power
Down Mode
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
IDD2NS
IDD3P
8
3
Active Standby
Current in
Power Down
Mode
CKE ≤ VIL(max), tCK = 15ns
mA
mA
IDD3PS
CKE ≤ VIL(max), tCK = ∞
3
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = 15ns
Input signals are changed one time during
2clks.
Active Standby
Current in Non
Power Down
Mode
IDD3N
30
All other pins ≥ VDD-0.2V or ≤ 0.2V
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
IDD3NS
IDD4
20
Burst Mode Op-
erating Current
tCK ≥ tCK(min), IOL=0mA
All banks active
110
190
100
180
90
mA
mA
1
2
Auto Refresh
Current
IDD5
tRC ≥ tRC(min), All banks active
170
Normal
2.0
1.0
Self Refresh
Current
IDD6
CKE ≤ 0.2V
mA
3
Low Power
Note: 1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open.
2. Min. of tRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3. HY57V561620FT(P) Series: Normal, HY57V561620FLT(P) Series: Low Power
Rev 1.2 / Dec. 2009
11
HYNIX [ HYNIX SEMICONDUCTOR ]
