HY29F002T
SIGNAL DESCRIPTIONS
Name
Type
Description
Address, active High. These eighteen inputs select one of 262,144 (256K)
bytes within the array for read or write operations. A[17] is the MSB and A[0] is
the LSB.
A[17:0]
Inputs
Inputs/Outputs Data Bus, active High. These pins provide an 8-bit data path for read and
DQ[7:0]
CE#
Tri-state
write operations.
Chip Enable, active Low. This input must be asserted to read data from or
write data to the HY29F002T. When High, the data bus is tri-stated and the
device is placed in the Standby mode.
Input
Output Enable, active Low. This input must be asserted for read operations
and negated for write operations. When High, data outputs from the device are
disabled and the data bus pins are placed in the high impedance state.
OE#
WE#
Input
Input
Write Enable, active Low. Controls writing of commands or command
sequences in order to program data or perform other operations. A write
operation takes place when WE# is asserted while CE# is Low and OE# is High.
Hardware Reset, active Low. Provides a hardware method of resetting the
HY29F002T to the read array state. When the device is reset, it immediately
terminates anyoperation in progress. The data bus is tri-stated and all read/write
commands are ignored while the input is asserted. While RESET# is asserted,
the device will be in the Standby mode.
RESET#
Input
5-volt (nominal) power supply.
Power and signal ground.
VCC
VSS
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MEMORY ARRAY ORGANIZATION
The 256 Kbyte Flash memory array is organized
into seven blocks called sectors (S0, S1, . . . ,
S6). A sector is the smallest unit that can be
erased and which can be protected to prevent
accidental or unauthorized erasure. See the ‘Bus
Operations’ and ‘Command Definitions’ sections
of this document for additional information on these
functions.
In the HY29F002T, four of the sectors, which com-
prise the boot block, vary in size from 8 to 32
Kbytes, while the remaining three sectors are
uniformly sized at 64 Kbytes. In this device, the
boot block is located at the top of the address
range.
Table 1 defines the sector addresses and corre-
sponding address ranges for the HY29F002T.
Table 1. HY29F002T Memory Array Organization
Sector Address
Size
Sector
Address Range
(Kbytes)
A[17]
A[16]
A[15]
A[14]
A[13]
S0
S1
S2
S3
S4
S5
S6
64
64
64
32
8
0
0
1
1
1
1
1
0
1
0
1
1
1
1
X
X
X
0
1
1
1
X
X
X
X
0
X
X
X
X
0
0x00000 - 0x0FFFF
0x10000 - 0x1FFFF
0x20000 - 0x2FFFF
0x30000 - 0x37FFF
0x38000 - 0x39FFF
0x3A000 - 0x3BFFF
0x3C000 - 0x3FFFF
8
0
1
16
1
X
Rev. 4.1/May 01
4
HYNIX [ HYNIX SEMICONDUCTOR ]
