GMS81C2020/GMS81C2120
Hyundai Micro Electronics
A/D Control Register
ADDRESS : EAH
RESET VALUE : -0000001
-
ADEN
ADS3
ADS2
ADS1
ADS0
ADST
ADSF
ADCM
Reserved
A/D Status bit
0 : A/D Conversion is in process
1 : A/D Conversion is completed
Analog Channel Select
0000 : Channel 0 ( R60/AN0 )
0001 : Channel 1 ( R61/AN1 )
0010 : Channel 2 ( R62/AN2 )
0011 : Channel 3 ( R63/AN3)
0100 : Channel 4 ( R64/AN4 )
0101 : Channel 5 ( R65/AN5 )
0110 : Channel 6 ( R66/AN6 )
0111 : Channel 7 ( R67/AN7 )
1000 : Channel 8 ( R64/AN8 )
1001 : Channel 9 ( R65/AN9 )
1010 : Channel 10 ( R66/AN10 )
1011 : Channel 11 ( R67/AN11 )
A/D Start bit
1 : A/D Conversion is started
After 1 cycle, cleared to "0"
0 : Bit force to zero
A/D Enable bit
1 : A/D Conversion is enable
0 : A/D Converter module shut off
and consumes no operation current
A/D Result Data Register
ADCR7 ADCR6 ADCR5
ADDRESS : EBH
RESET VALUE : Undefined
ADCR4
ADCR3
ADCR2
ADCR1
ADCR0
ADCR
Figure 18-2 A/D Converter Registers
A/D Converter Cautions
ENABLE A/D CONVERTER
A/D INPUT CHANNEL SELECT
ANALOG REFERENCE SELECT
A/D START ( ADST = 1 )
NOP
(1) Input range of AN11 to AN0
The input voltages of AN11 to AN0 should be within the
specification range. In particular, if a voltage above AVDD
or below AVSS is input (even if within the absolute maximum
rating range), the conversion value for that channel can not be in-
determinate. The conversion values of the other channels may
also be affected.
(2) Noise countermeasures
In order to maintain 8-bit resolution, attention must be paid to
noise on pins AVDD and AN11 to AN0. Since the effect in-
creases in proportion to the output impedance of the analog
input source, it is recommended that a capacitor be connected
externally as shown in Figure 18-4 in order to reduce noise.
Analog
AN11~AN0
Input
ADSF = 1
YES
NO
100~1000pF
READ ADCR
Figure 18-4 Analog Input Pin Connecting Capacitor
Figure 18-3 A/D Converter Operation Flow
64
preliminary
Nov. 1999 Ver 0.0
HYNIX [ HYNIX SEMICONDUCTOR ]
