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GMS87C2120 参数 Datasheet PDF下载

GMS87C2120图片预览
型号: GMS87C2120
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS单芯片8位微控制器与A / D转换器和VFD驱动器 [CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver]
分类和应用: 驱动器转换器微控制器
文件页数/大小: 92 页 / 1757 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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Hyundai Micro Electronics  
GMS81C2020/GMS81C2120  
18. ANALOG TO DIGITAL CONVERTER  
The analog-to-digital converter (A/D) allows conversion  
of an analog input signal to a corresponding 8-bit digital  
value. The A/D module has twelve analog inputs, which  
are multiplexed into one sample and hold. The output of  
the sample and hold is the input into the converter, which  
generates the result via successive approximation.  
SEL[11:8] in R7FUNC register. And selected the corre-  
sponding channel to be converted by setting ADS[3:0].  
The processing of conversion is start when the start bit  
ADST is set to "1". After one cycle, it is cleared by hard-  
ware. The register ADCR contains the results of the A/D  
conversion. When the conversion is completed, the result  
is loaded into the ADCR, the A/D conversion status bit  
ADSF is set to "1", and the A/D interrupt flag ADIF is set.  
The block diagram of the A/D module is shown in Figure  
18-1 . The A/D status bit ADSF is set automatically when  
A/D conversion is completed, cleared when A/D conver-  
sion is in process. The conversion time takes maximum 20  
uS (at fXI=4 MHz).  
The A/D module has two registers which are the control  
register ADCM and A/D result register ADCR. The  
ADCM register, shown in Figure 18-2 , controls the oper-  
ation of the A/D converter module. The port pins can be  
configured as analog inputs or digital I/O.  
To use analog inputs, each port is assigned analog input  
port by setting the bit ANSEL[7:0] in R6FUNC register.  
Also it is assigned analog input port by setting the bit AN-  
ADS[3:0]  
R6FUNC[7:0]  
R7FUNC[3:0]  
1011  
1010  
0111  
R73/AN11  
R67/AN7  
ANSEL11  
R72/AN10  
ANSEL7  
0110  
0101  
0100  
0011  
0010  
R66/AN6  
R65/AN5  
R64/AN4  
R63/AN3  
R62/AN2  
ANSEL10  
ANSEL6  
ANSEL5  
ANSEL4  
ANSEL3  
ANSEL2  
1001  
1000  
R71/AN9  
ANSEL9  
R70/AN8  
ANSEL8  
A/D Result Register  
ADDRESS : EBH  
ADCR(8-bit)  
RESET VALUE : Undefined  
0001  
0000  
R61/AN1  
R60/AN0  
Sample & Hold  
S/H  
ANSEL1  
ANSEL0  
COMPARATOR  
Successive  
Approximation  
Circuit  
ADIF  
A/D Interrupt  
Resistor  
Ladder  
Circuit  
AVDD  
ADEN  
[ADCM.6]  
Figure 18-1 A/D Converter Block Diagram  
Nov. 1999 Ver 0.0  
preliminary  
63  
 
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