Chapter 4. Peripheral Hardware
Clock Control Register
7
0
-
-
WDTON
ENPCK
BTCL
BTS2
BTS1
BTS0
CKCTLR
W <00C7H>
ENPCK
Peripheral Clock
Stopped
0
1
Provided
4.1.4 Basic Interval Timer (B.I.T)
- 8bit binary counter
- Use the bit output of prescaler as input to secure the oscillation stabilization time
after power-on
- Secures the oscillation stabilization time in standby mode (stop mode) release
- Contents of B.I.T can be read
- Provides the clock for watch dog timer.
DATA BUS
-
-
WTON
ENPCK
BTCL
BTS2
BTS1
BTS0
CKCTLR
PS3
PS4
PS5
PS6
PS7
PS8
PS9
PS10
BITR
BIT7
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
IFBIT
MUX
DATA BUS
Fig. 4.4 Block diagram of Basic Interval Timer
4 - 4
HYNIX [ HYNIX SEMICONDUCTOR ]
