Charge Pump Voltage Converters
Detailed Description
TJ7660
The TJ7660 contains all the necessary circuitry to complete a negative voltage converter, with the
exception of 2 external capacitors which may be inexpensive 10µF polarized electrolytic types. The mode of
operation of the device may be best understood by considering Figure12, which shows an idealized negative
voltage converter. Capacitor C1 is charged to a voltage, V+, for the half cycle when switches S1 and S3 are
closed. (Note: Switches S2 and S4 are open during this half cycle.) During the second halfcycle of operation,
switches S2 and S4 are closed, with S1 and S3 open, thereby shifting capacitor C1 negatively by V+ volts.
Charge is then transferred from C1 to C2 such that the voltage on C2 is exactly V+, assuming ideal switches and
no load on C2. The TJ 7660 approaches this ideal situation more closely than existing non-mechanical circuits.
In the TJ7660, the 4 switches of Figure 12 are MOS power switches; S1 is a P-Channel device and S2,
S3 and S4 are N-Channel devices. The main difficulty with this approach is that in integrating the switches, the
substrates of S3 and S4 must always remain reverse biased with respect to their sources, but not so much as to
degrade their “ON” resistances. In addition, at circuit start-up, and under output short circuit conditions (VOUT
=
V+), the output voltage must be sensed and the substrate bias adjusted accordingly. Failure to accomplish this
would result in high power losses and probable device latchup.
This problem is eliminated in the TJ7660 by a logic network which senses the output voltage (VOUT) together
with the level translators, and switches the substrates of S3 and S4 to the correct level to maintain necessary
reverse bias.
The voltage regulator portion of the TJ7660 is an integral part of the anti-latchup circuitry, however its inherent
voltage drop can degrade operation at low voltages. Therefore, to improve low voltage operation the “LV” pin
should be connected to GROUND, disabling the regulator. For supply voltages greater than 3.5V the LV
terminal must be left open to insure latchup proof operation, and prevent device damage.
Theoretical Power Efficiency Considerations
In theory a voltage converter can approach 100% efficiency if certain conditions are met.
1. The driver circuitry consumes minimal power.
2. The output switches have extremely low ON resistance and virtually no offset.
3. The impedances of the pump and reservoir capacitors are negligible at the pump frequency.
The TJ7660 approaches these conditions for negative voltage conversion if large values of C1 and C2 are used.
ENERGY IS LOST ONLY IN THE TRANSFER OF CHARGE BETWEEN CAPACITORS IF A CHANGE IN
VOLTAGE OCCURS. The energy lost is defined by:E = 1/2 C1 (V12 - V22)
where V1 and V2 are the voltages on C1 during the pump and transfer cycles. If the impedances of
C1 and C2 are relatively high at the pump frequency (refer to Figure 12) compared to the value of
RL, there will be a substantial difference in the voltages V1 and V2. Therefore it is not only desirable
to make C2 as large as possible to eliminate output voltage ripple, but also to employ a
correspondingly large value for C1 in order to achieve maximum efficiency of operation.
Jan. 2007-Rev 1.0
5
HTC [ HTC KOREA TAEJIN TECHNOLOGY CO. ]
