HT48R063/064/065/066/0662/067
P
W
M
C
o
n
t
r
P
o
l
W
M
0
,
P
W
M
1
,
P
P
P
W
W
W
M
M
M
C
C
C
0
1
2
T
i
m
e
-
B a
l
s
e
e
v
e
T
i
m
e
-
B
a
s
e
C
o
n
t
r
o
T
0
S
1
1
0
1
3
(
2
~
2
)
*
f
T
P
0
1
f
S
Y
S
f
T
P
M
U
X
7
S
t
a
g
e
C
o
u
n
t
e
r
f
L
X
T
7
T
o
T
i
m
e
r
0
i
T
0
P
S
C
[
2
:
0
]
8
-
1
M
U
X
(
T
f
0
C
=
K
T
P
~
f
T
/
P
f
1
2
8
)
7
1
T
o
T
i
m
e
r
2
i
T
2
P
S
C
[
2
:
0
]
8
-
M
U
X
(
T
f
2
C
=
K
T
P
~
f
T
/
P
f
1
2
8
)
Clock Structure for Timer/PWM/Time Base
D
a
t
a
B
u
s
T
0
M
1
,
T
0
M
0
P
r
e
l
o
a
d
R
e
g
i
s
t
e
r
T
i
m
e
r
0
I
n
t
e
r
n
a
l
C
l
o
c
k
(
T
f
0
)
C
K
M
o
d
e
C
o
n
t
r
o
l
T
0
O
V
O
t
v
e
D
r
f
l
o
w
U
p
C
o
u
n
t
e
r
T
C
0
o
I
n
t
e
r
r
u
p
T
0
O
N
¸
P
F
0
2
T
0
E
G
8-bit Timer/Event Counter 0 Structure
D
a
t
a
B
u
s
T
1
M
1
,
T
1
M
0
P
r
e
l
o
a
d
R
e
g
i
s
t
e
r
M
f
S
Y
S
U
L
X
T
O
s
c
i
l
l
a
t
o
r
X
M
o
d
e
C
o
n
t
r
o
l
T
1
O
V
T
1
S
O
t
v
e
D
r
f
l
o
w
U
p
C
o
u
n
t
e
r
T
C
1
o
I
n
t
e
r
r
u
p
T
1
O
N
¸
P
F
1
2
T
1
E
G
8-bit Timer/Event Counter 1 Structure
D
a
t
a
B
u
s
T
2
M
1
,
T
2
M
0
P
r
e
l
o
a
d
R
e
g
i
s
t
e
r
T
i
m
e
r
2
I
n
t
e
r
n
a
l
C
l
o
c
k
M
o
d
e
C
o
n
t
r
o
l
(
T
f
2
)
C
K
T
2
O
V
T
C
2
O
r
v
e
r
f
l
o
w
U
p
C
o
u
n
t
e
t
o
I
n
t
e
r
r
u
p
T
2
E
G
T
2
O
N
8-bit Timer/Event Counter 2 Structure
P
F
D
C
S
0
1
P
P
F
F
D
D
0
1
M
U
X
P
F
D
o
u
t
p
u
t
Note: If PWM0/PWM1/PWM2 is enabled, then fTP comes from fSYS (ignore T0S)
Rev. 1.10
41
June 9, 2009
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
