HT48R063/064/065/066/0662/067
·
TMR1C Register
Bit
7
6
T1M0
R/W
0
5
4
T1ON
R/W
0
3
T1EG
R/W
1
2
1
0
Name
R/W
T1M1
R/W
0
T1S
R/W
0
¾
¾
¾
¾
¾
¾
¾
¾
¾
POR
Bit 7,6
T1M1, T1M0: Timer1 operation mode selection
00: no mode available
01: event counter mode
10: timer mode
11: pulse width capture mode
Bit 5
Bit 4
Bit 3
T1S: timer clock source
0: fSYS/4
1: LXT oscillator
T1ON: Timer/event counter counting enable
0: disable
1: enable
T1EG:
Event counter active edge selection
0: count on raising edge
1: count on falling edge
Pulse width capture active edge selection
0: start counting on falling edge, stop on rasing edge
1: start counting on raising edge, stop on falling edge
Bit 2~0
unimplemented, read as ²0²
·
TMR2C Register
Bit
7
6
T2M0
R/W
0
5
4
T2ON
R/W
0
3
T2EG
R/W
1
2
T2PSC2
R/W
0
1
T2PSC1
R/W
0
0
T2PSC0
R/W
0
Name
R/W
T2M1
R/W
0
¾
¾
¾
POR
Bit 7, 6
T2M1, T2M0: Timer2 operation mode selection
00: no mode available
01: event counter mode
10: timer mode
11: pulse width capture mode
Bit 5
Bit 4
unimplemented, read as ²0²
T2ON: Timer/event counter counting enable
0: disable
1: enable
Bit 3
T2EG:
Event counter active edge selection
0: count on raising edge
1: count on falling edge
Pulse width capture active edge selection
0: start counting on falling edge, stop on rasing edge
1: start counting on raising edge, stop on falling edge
Bit 2~0
T2PSC2, T2PSC1, T2PSC0: Timer prescaler rate selection
Timer internal clock=
000: fTP
001: fTP/2
010: fTP/4
011: fTP/8
100: fTP/16
101: fTP/32
110: fTP/64
111: fTP/128
Rev. 1.10
43
June 9, 2009
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
