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HT48R0AA-1 参数 Datasheet PDF下载

HT48R0AA-1图片预览
型号: HT48R0AA-1
PDF下载: 下载PDF文件 查看货源
内容描述: 高性价比的I / O型8位OTP MCU [Cost-Effective I/O Type 8-Bit OTP MCU]
分类和应用:
文件页数/大小: 40 页 / 258 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT48R0AA-1  
In the event count or timer mode, once the Timer/Event  
Counter 0/1 starts counting, it will count from the current  
contents in the Timer/Event Counter 0/1 to FFH. Once  
overflow occurs, the counter is reloaded from the  
Timer/Event Counter 0/1 preload register and generates  
the interrupt request flag (T0F/T1F; bit 5/6 of the INTC) at  
the same time.  
TMR0/TMR1 has received a transient from low to high  
(or high to low if the T0E/T1E bits is ²0²) it will start  
counting until the TMR0/TMR1 returns to the original  
level and resets the T0ON/T1ON. The measured result  
will remain in the Timer/Event Counter 0/1 even if the  
activated transient occurs again. In other words, only  
one cycle measurement can be done. Until setting the  
T0ON/T1ON, the cycle measurement will function again  
as long as it receives further transient pulse. Note that,  
in this operating mode, the Timer/Event Counter 0/1  
In the pulse width measurement mode with the  
T0ON/T1ON and T0E/T1E bits equal to one, once the  
Bit No.  
Label  
Function  
Defines the prescaler stages, T0PSC2, T0PSC1, T0PSC0=  
000: fINT=fSYS/2  
001: fINT=fSYS/4  
010: fINT=fSYS/8  
011: fINT=fSYS/16  
100: fINT=fSYS/32  
101: fINT=fSYS/64  
110: fINT=fSYS/128  
111: fINT=fSYS/256  
T0PSC0~  
T0PSC2  
0~2  
Defines the TMR0 active edge of the timer/event counter:  
In Event Counter Mode (T0M1,T0M0)=(0,1):  
1:count on falling edge;  
0:count on rising edge  
3
T0E  
In Pulse Width measurement mode (T0M1,T0M0)=(1,1):  
1: start counting on the rising edge, stop on the falling edge;  
0: start counting on the falling edge, stop on the rising edge  
4
5
T0ON  
Enable or disable timer 0 counting (0=disable; 1=enable)  
¾
Unused bit, read as ²0²  
Defines the operating mode (T0M1, T0M0)  
01=Event count mode (external clock)  
10=Timer mode (internal clock)  
11=Pulse width measurement mode  
00=Unused  
6
7
T0M0  
T0M1  
TMR0C (0EH) Register  
Bit No.  
Label  
Function  
0~2  
¾
Unused bit, read as ²0²  
Defines the TMR1 active edge of the timer/event counter:  
In Event Counter Mode (T1M1,T1M0)=(0,1):  
1:count on falling edge;  
0:count on rising edge  
3
T1E  
In Pulse Width measurement mode (T1M1,T1M0)=(1,1):  
1: start counting on the rising edge, stop on the falling edge;  
0: start counting on the falling edge, stop on the rising edge  
4
5
T1ON  
Enable or disable timer 1 counting (0=disabled; 1=enabled)  
¾
Unused bit, read as²0²  
Defines the operating mode (T1M1, T1M0)  
01=Event count mode (external clock)  
10=Timer mode (internal clock)  
11=Pulse width measurement mode  
00=Unused  
6
7
T1M0  
T1M1  
TMR1C (11H) Register  
Rev. 1.10  
14  
July 27, 2007  
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