HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
and if the external signal continues to change state. In such a case, the Timer/Event Counter will
continue to count these external events and if an overflow occurs the device will be woken up from
its Power-down condition. To prevent such a wake-up from occurring, the timer interrupt request
flag should first be set high before issuing the "HALT" instruction to enter the Idle/Sleep Mode.
Timer Program Example
The program shows how the Timer/Event Counter registers are setup along with how the interrupts
are enabled and managed. Note how the Timer/Event Counter is turned on, by setting bit 4 of the
Timer Control Register. The Timer/Event Counter can be turned off in a similar way by clearing
the same bit. This example program sets the Timer/Event Counters to be in the timer mode, which
uses the internal system clock as their clock source.
PFD Programming Example
org 04h
; external interrupt vector
org 08h
jmpꢀtmr0intꢀꢀ
; Timer Counter 0 interrupt vector
;ꢀjumpꢀhereꢀwhenꢀTimerꢀ0ꢀoverflows
:
:
org 20h
; main program
:
:
;internal Timer 0 interrupt routine
tmr0int:
:
; Timer 0 main program placed here
:
:
begin:
;setup Timer 0 registers
mov a,09bh
mov tmr0,a
mov a,081h
mov tmr0c,a
; setup Timer 0 preload value
; setup Timer 0 control register
; timer mode and prescaler set to /2
;setup interrupt register
mov a,00dh
mov intc0,a
; enable master interrupt and both timer interrupts
:
:
set tmr0c.4
; start Timer 0
:
:
Time Base
The device includes a Time Base function which is used to generate a regular time interval signal.
The Time Base time interval magnitude is determined using an internal 13 stage counter sets
the division ratio of the clock source. This division ratio is controlled by both the TBSEL0 and
TBSEL1 bits in the CTRL1 register. The clock source is selected using the T0S bit in the TMR0C
register.
When the Time Base time out, a Time Base interrupt signal will be generated. It should be noted
that as the Time Base clock source is the same as the Timer/Event Counter clock source, care
should be taken when programming.
Rev. 1.00
5ꢄ
�anꢀaꢁꢂ ꢃꢄꢅ ꢃ011