HT46R068B/HT46R069B
Enhanced A/D Type 8-bit OTP MCU
PWM Output Control
The PWM outputs are pin-shared with the I/O pins PA4, PC2 and PC3. To operate as a PWM
output and not as an I/O pin, the correct bits must be set in the CTRL0 and CTRL2 register. A
zero value must also be written to the corresponding bit in the I/O port control register PAC.4,
PCC.2 and PCC.3 to ensure that the corresponding PWM output pin is setup as an output. After
these two initial steps have been carried out, and of course after the required PWM value has
been written into the PWMn register, writing a high value to the corresponding bit in the output
data register PA.4, PC.2 and PC.3 will enable the PWM data to appear on the pin. Writing a zero
value will disable the PWM output function and force the output low. In this way, the Port data
output registers can be used as an on/off control for the PWM function. Note that if the CTRL0
and CTRL2 registers have selected the PWM function, but a high value has been written to its
corresponding bit in the PAC or PCC control register to configure the pin as an input, then the pin
can still function as a normal input line, with pull-high resistor options.
f
S
S
Y
/
2
[
W
P
M
]
=
0
1
0
P
W
M
5
5
5
0
1
1
1
1
1
8
8
8
/
/
/
2
2
2
5
5
5
5
0
0
1
1
1
1
1
1
8
8
8
8
/
/
/
/
2
2
2
2
5
5
5
5
0
1
1
2
1
1
1
1
8
8
8
8
/
/
/
/
2
2
2
2
[
W
P
M
]
=
0
1
1
P
W
M
[
W
P
M
]
=
0
1
2
P
W
M
[
W
P
M
]
=
0
1
3
P
W
M
5
2
1
8
/
2
P
W
M
m
o
d
a
u
i
o
t
l
n
p
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i
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r
d
:
1
2
/
S
8
f
S
Y
M
o
d
a
u
i
o
t
l
n
c
y
e
0
c
l
M
o
d
a
u
i
o
t
l
n
c
y
e
1
c
l
M
o
d
a
u
i
o
t
l
n
c
y
e
0
c
l
P
W
M
c
y
e
:
c
2
l
5
f
S
6
S
Y
/
7+1 PWM Mode
b
7
b
0
P
W
M
R
g
e
s
i
e
t
r
7
1
+
(
)
M
o
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d
A
C
v
l
a
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u
D
C
v
l
a
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u
PWM Register for 7+1 Mode
PWM Programming Example
TheꢀfollowingꢀsampleꢀprogramꢀshowsꢀhowꢀtheꢀPWM0ꢀoutputꢀisꢀsetupꢀandꢀcontrolled.
movꢀa,64hꢀ
ꢀ
ꢀ
;ꢀsetupꢀPWMꢀvalueꢀofꢀdecimalꢀ100
mov pwm0,a
setꢀctrl0.5ꢀꢀ
setꢀctrl0.3ꢀꢀ
clrꢀpac.4ꢀꢀ ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
;ꢀselectꢀtheꢀ7+1ꢀPWMꢀmode
;ꢀselectꢀpinꢀPA4ꢀtoꢀhaveꢀaꢀPWMꢀfunction
;ꢀsetupꢀpinꢀPA4ꢀasꢀanꢀoutput
;ꢀenableꢀtheꢀPWMꢀoutput
setꢀpa.4ꢀ
: :
ꢀ
clrꢀpa.4ꢀꢀ
ꢀ
ꢀ
ꢀ
ꢀ
;ꢀdisableꢀtheꢀPWMꢀoutput_ꢀpin
;ꢀPA4ꢀforcedꢀlow
ꢀ
ꢀꢀ
Rev. 1.00
ꢄ0
�anꢀaꢁꢂ ꢃꢄꢅ ꢃ011