HT45R38
A/D Converter
lected as an analog input, the I/O functions and pull-high
resistor of this I/O line are disabled and the A/D con-
verter circuit is powered on. The EOCB bit (bit6 of the
ADCR) is end of A/D conversion flag. Check this bit to
know when the A/D conversion is completed.
The 5 channels 12-bit resolution A/D converter are im-
plemented in this microcontroller.
The A/D converter contains 4 special registers which
are; ADRL (28H), ADRH (29H), ADCR (2AH) and ACSR
(2BH). The ADRH and ADRL are A/D result register
higher-order byte and lower-order byte and are
read-only. After the A/D conversion is completed, the
ADRH and ADRL should be read to get the conversion
result data. The ADCR is an A/D converter control regis-
ter, which defines the A/D channel number, analog
channel select, start A/D conversion control bit and the
end of A/D conversion flag. If the users want to start an
A/D conversion, define PE configuration, select the con-
verted analog channel, and give START bit a raising
edge and falling edge (0®1®0). At the end of A/D con-
version, the EOCB bit is cleared and an A/D converter
interrupt occurs (if the A/D converter interrupt is en-
abled). The ACSR is A/D clock setting register, which is
used to select the A/D clock source.
The START bit of the ADCR is used to begin the conver-
sion of the A/D converter. Giving START bit a rising
edge and falling edge means that the A/D conversion
has started. In order to ensure that the A/D conversion is
completed, the START should remain at ²0² until the
EOCB is cleared to ²0² (end of A/D conversion). Bit1
and bit0 of the ACSR register are used to select the A/D
clock source.
When the A/D conversion has completed, the A/D inter-
rupt request flag will be set. The EOCB bit is set to ²1²
when the START bit is set from ²0² to ²1².
Important Note for A/D initialisation:
Special care must be taken to initialise the A/D con-
verter each time the Port E A/D channel selection bits
are modified, otherwise the EOCB flag may be in an un-
defined condition. An A/D initialisation is implemented
by setting the START bit high and then clearing it to zero
within 10 instruction cycles of the Port E channel selec-
tion bits being modified. Note that if the Port E channel
selection bits are all cleared to zero then an A/D initialis-
ation is not required.
The A/D converter control register is used to control the
A/D converter. The bit2~bit0 of the are used to select an
analog input channel. There are a total of five channels
to select. The bit5~bit3 of the ADCR are used to set PE
configurations. PE can be an analog input or as digital
I/O line determined by these 3 bits. Once a PE line is se-
Bit No.
Label
Function
Selects the A/D converter clock source
00= system clock/2
0
1
ADCS0
ADCS1
01= system clock/8
10= system clock/32
11= undefined
2~7
¾
Unused bit, read as ²0²
ACSR (2BH) Register
Bit No.
Label
Function
0
1
2
ACS0
ACS1
ACS2
Defines the analog channel select
3
4
5
PCR0
PCR1
PCR2
Defines the port E configuration select. If PCR0, PCR1 and PCR2 are all zero, the ADC cir-
cuit is powered off to reduce power consumption
Indicates end of A/D conversion. (0= end of A/D conversion)
Each time bits 3~5 change state the A/D should be initialised by issuing a START signal,
otherwise the EOCB flag may have an undefined condition. See ²Important note for A/D in-
itialisation².
6
7
EOCB
Starts the A/D conversion.
START 0®1®0= Start
0®1= Reset A/D converter and set EOCB to ²1².
ADCR (2AH) Register
Rev. 1.00
25
December 13, 2006
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
