HT45R38
The OPA allows its input voltage offset to be adjusted by using common mode inputs to calibrate the offset.
The calibration steps are as following:
S
1
O
P
P
P
E
0
/
A
N
0
S
2
S
3
O
P
N
A
O
F
0
~
A
O
F
3
O
P
A
E
N
P
E
0
/
A
N
0
/
O
P
O
Note:
Set AOFM=1 to offset cancellation mode - S3 is closed
Set ARS to select which input pin is the reference voltage - S1 or S2 closed
Adjust AOF0~AOF3 until the output status has changed.
Set AOFM=0 to normalise the OPA mode
Low Voltage Reset - LVR
The relationship between VDD and VLVR is shown below.
The microcontroller provides low voltage reset circuit in
order to monitor the supply voltage of the device. If the
supply voltage of the device is within the range
0.9V~VLVR, such as when changing a battery, the LVR
will automatically reset the device internally.
V
D
D
V
O P R
5
.
5
V
5
.
5
V
The LVR includes the following specifications:
V
L
V
R
3
.
0
V
·
The low voltage (0.9V~VLVR) has to remain in its origi-
nal state for longer than tLVR. If the low voltage state
does not exceed tLVR, the LVR will ignore it and will not
perform a reset function.
2
.
2
V
0
.
9
V
·
The LVR uses an ²OR² function with the external RES
signal to perform a chip reset.
Note:
VOPR is the voltage range for proper chip opera-
tion at 4MHz system clock.
V
D
D
5
.
5
V
L
V
R
D
e
t
e
c
t
V
o
l
t
a
g
e
V
L
V
R
0
.
9
0
V
V
R
e
s
e
t
S
i
g
n
a
l
R
e
s
e
t
N
o
r
m
a
l
O
p
e
r
a
t
i
o
n
R
e
s
e
t
*
1
*
2
Low Voltage Reset
Note: *1: To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system
clock pulses before starting the normal operation.
*2: Since low voltage has to be maintained its original state for longer than tLVR, therefore a tLVR delay enters
the reset mode.
Rev. 1.00
29
December 13, 2006
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
