HT45R38
The following diagram illustrates the waveforms associated with the 6+2 mode of PWM operation. It is important to
note how the single PWM cycle is subdivided into 4 individual modulation cycles, numbered from 0~3 and how the AC
value is related to the PWM value.
S
Y
S
[
P
W
M
]
=
1
0
0
P
W
M
2
5
/
6
4
2
2
2
2
5
5
6
6
/
/
/
/
6
6
6
6
4
4
4
4
2
2
2
2
5
5
5
6
/
/
/
/
6
6
6
6
4
4
4
4
2
2
2
2
5
5
5
5
/
/
/
/
6
6
6
6
4
4
4
4
2
2
2
2
5
6
6
6
/
/
/
/
6
6
6
6
4
4
4
4
[
P
W
M
]
=
1
0
1
P
W
M
2
2
2
6
6
6
/
/
/
6
6
6
4
4
4
[
P
W
M
]
=
1
0
2
P
W
M
[
P
W
M
]
=
1
0
3
P
W
M
P
W
M
m
o
d
u
l
a
t
i
o
n
p
e
r
i
o
d
:
6
4
/
f
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
0
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
1
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
2
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
3
M
o
d
u
l
a
t
i
o
n
c
y
c
l
e
0
P
W
M
c
y
c
l
e
:
2
5
6
/
f
6+2 PWM Mode
b
7
b
0
P
W
M
R
e
g
i
s
t
e
r
(
6
+
2
)
M
o
d
e
A
D
C
v
a
l
u
u
e
C
v
a
l
e
PWM Register for 6+2 Mode
·
7+1 PWM Mode
the DC value. The second group which consists of bit0
is known as the AC value. In the 7+1 PWM mode, the
duty cycle value of each of the two modulation
sub-cycles is shown in the following table.
Each full PWM cycle, as it is controlled by an 8-bit
PWM register has 256 clock periods. However, in the
7+1 PWM mode, each PWM cycle is subdivided into
two individual sub-cycles, known as modulation cycle
0 and modulation cycle 1, denoted as ²i² in the table.
Each one of these two sub-cycles contains 128 clock
cycles. In this mode, a modulation frequency increase
by a factor of two is achieved. The 8-bit PWM register
value, which represents the overall duty cycle of the
PWM waveform, is divided into two groups. The first
group which consists of bit1~bit7 is denoted here as
DC
Parameter
AC (0~1)
i<AC
(Duty Cycle)
DC
128
1
Modulation cycle
i
DC
(i=0~1)
i³AC
128
7+1 Mode Modulation Cycle Values
Rev. 1.00
23
December 13, 2006
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
