HT45R37
The different kinds of resets all affect the internal registers of the microcontroller in different ways. To ensure reliable
continuation of normal program execution after a reset occurs, it is important to know what condition the microcontroller
is in after a particular reset occurs. The following table describes how each type of reset affects each of the
microcontroller internal registers. Note that where more than one package type exists the table will reflect the situation
for the larger package type.
Reset
RES Reset
WDT Time-out
WDT Time-out
(HALT)
Register
(Power-on)
(Normal Operation) (Normal Operation)
MP0
MP1
ACC
PCL
x x x x x x x x
x x x x x x x x
x x x x x x x x
0 0 0 0 0 0 0 0
x x x x x x x x
- x x x x x x x
- - 0 0 0 1 1 1
- - 0 0 x x x x
- 0 0 0 0 0 0 0
x x x x x x x x
0 0 - 0 1 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
- - 1 1 1 1 1 1
- - 1 1 1 1 1 1
- - - 1 1 1 1 1
- - - 1 1 1 1 1
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
0 0 0 0 - - - 0
0 0 0 0 0 0 0 0
0 0 0 0 - - - 0
0 0 0 0 0 0 0 0
- 0 0 0 - 0 0 0
- - 0 0 - - 0 0
0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
x x x x - - - -
x x x x x x x x
0 1 0 0 0 0 0 0
1 0 - - - 0 0 0
0 0 0 0 0 x 1 1
0 0 0 0 0 0 0 0
u u u u u u u u
u u u u u u u u
u u u u u u u u
0 0 0 0 0 0 0 0
u u u u u u u u
- u u u u u u u
- - 0 0 0 1 1 1
- - u u u u u u
- 0 0 0 0 0 0 0
x x x x x x x x
0 0 - 0 1 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
- - 1 1 1 1 1 1
- - 1 1 1 1 1 1
- - - 1 1 1 1 1
- - - 1 1 1 1 1
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
0 0 0 0 - - - 0
0 0 0 0 0 0 0 0
0 0 0 0 - - - 0
0 0 0 0 0 0 0 0
- 0 0 0 - 0 0 0
- - 0 0 - - 0 0
0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
x x x x - - - -
x x x x x x x x
0 1 0 0 0 0 0 0
1 0 - - - 0 0 0
0 0 0 0 0 x 1 1
0 0 0 0 0 0 0 0
u u u u u u u u
u u u u u u u u
u u u u u u u u
0 0 0 0 0 0 0 0
u u u u u u u u
- u u u u u u u
- - 0 0 0 1 1 1
- - 1 u u u u u
- 0 0 0 0 0 0 0
x x x x x x x x
0 0 - 0 1 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
- - 1 1 1 1 1 1
- - 1 1 1 1 1 1
- - - 1 1 1 1 1
- - - 1 1 1 1 1
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
0 0 0 0 - - - 0
0 0 0 0 0 0 0 0
0 0 0 0 - - - 0
0 0 0 0 0 0 0 0
- 0 0 0 - 0 0 0
- - 0 0 - - 0 0
0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
x x x x - - - -
x x x x x x x x
0 1 0 0 0 0 0 0
1 0 - - - 0 0 0
0 0 0 0 0 x 1 1
0 0 0 0 0 0 0 0
u u u u u u u u
u u u u u u u u
u u u u u u u u
0 0 0 0 0 0 0 0
u u u u u u u u
- u u u u u u u
- - u u u u u u
- - 1 1 u u u u
- u u u u u u u
u u u u u u u u
u u - u u u u u
u u u u u u u u
u u u u u u u u
- - u u u u u u
- - u u u u u u
- - - u u u u u
- - - u u u u u
u u u u u u u u
u u u u u u u u
u u u u - - - u
u u u u u u u u
u u u u - - - u
u u u u u u u u
- u u u - u u u
- - u u - - u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
u u u u - - - -
u u u u u u u u
u u u u u u u u
u u - - - u u u
u u u u u u u u
u u u u u u u u
TBLP
TBLH
RTCC
STATUS
INTC0
TMR0
TMR0C
PA
PAC
PB
PBC
PC
PCC
PD
PDC
PWM0L
PWM0H
PWM1L
PWM1H
INTC1
MFIC0
MFIC1
ASCR0
ASCR1
ASCR2
ADRL
ADRH
ADCR
ACSR
CLKMOD
PAWU
Rev. 1.20
60
February 25, 2011