欢迎访问ic37.com |
会员登录 免费注册
发布采购

HT45R37-A(28SSOP-A) 参数 Datasheet PDF下载

HT45R37-A(28SSOP-A)图片预览
型号: HT45R37-A(28SSOP-A)
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, UVPROM, 12MHz, CMOS, PDSO28]
分类和应用: 可编程只读存储器LTE微控制器光电二极管
文件页数/大小: 100 页 / 666 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
 浏览型号HT45R37-A(28SSOP-A)的Datasheet PDF文件第60页浏览型号HT45R37-A(28SSOP-A)的Datasheet PDF文件第61页浏览型号HT45R37-A(28SSOP-A)的Datasheet PDF文件第62页浏览型号HT45R37-A(28SSOP-A)的Datasheet PDF文件第63页浏览型号HT45R37-A(28SSOP-A)的Datasheet PDF文件第65页浏览型号HT45R37-A(28SSOP-A)的Datasheet PDF文件第66页浏览型号HT45R37-A(28SSOP-A)的Datasheet PDF文件第67页浏览型号HT45R37-A(28SSOP-A)的Datasheet PDF文件第68页  
HT45R37  
b
7
b
0
S
L
O
W
S
L
C
O
2
W
S
L
C
O
1
W
S
I
C
M
0
I
D
L
L
H
E
T
T
O
O
I
D
L
E
H
N
L
C
L
K
L
C
K
M
O
D
R
e
g
i
s
t
e
r
f
1
0
S
Y
S
s
e
l
e
c
t
:
:
M
f
f
S
L
O
W
I
1
0
d
l
e
m
s
o
d
e
:
:
e
d
n
i
a
b
l
e
a
b
l
e
H
1
0
i
g
h
o
s
c
i
l
l
l
l
a
a
t
o
r
r
e
a
d
:
:
t
n
i
i
m
m
e
-
-
o
o
u
u
t
e
o
o
n
n
-
-
t
t
i
i
m
m
-
-
o
u
u
t
t
L
1
0
o
:
:
w
o
s
c
f
i
l
a
g
t
o
r
r
e
a
d
t
n
e
t
e
o
i
2
S
1
0
P
I
/
I
C
c
o
n
t
n
u
e
s
r
:
:
e
d
n
a
b
l
e
i
s
a
l
b
l
e
f
S
L
O
W
s
e
e
c
t
i
o
n
S
L
O
W
S
W
L
C
O
2
W
S
W
L
C
O
1
W
W
f
S
C
L
O
W
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
f
f
S
S
L
L
f
f
f
M
/
/
/
6
3
1
4
2
6
M
M
f
f
f
M
M
M
/
/
/
8
4
2
Clock Control Register - CLKMOD  
·
Slow mode1  
M on, fSLOW=fM/2~fM/64, fSYS=fSLOW, CPU on, fS on, fWDT  
gether with fSYS/4, it is used as a clock source for certain  
internal functions such as the Watchdog Timer, Buzzer,  
RTC Interrupt and Time Base Interrupt. The internal  
clock fS, is simply a choice of either fSUB or fSYS/4, using a  
configuration option.  
f
on/off depending upon the WDT configuration option  
and WDT control register.  
·
·
Idle mode  
fM, fSLOW, fSYS off, CPU off; fSUB on, fS on/off by selecting  
fSUB or fSYS/4, fWDT on/off depending upon the WDT  
configuration option and WDT control register.  
Operating Modes  
After the correct clock source configuration selections  
are made, overall operation of the chosen clock is  
achieved using the CLKMOD register. A combination of  
the HLCLK and IDLEN bits in the CLKMOD register and  
use of the HALT instruction determine in which mode the  
device will be run. The devices can operate in the follow-  
ing Modes.  
Sleep mode  
fM, fSLOW, fSYS, fS, CPU off; fSUB, fWDT on/off depending  
upon the WDT configuration option and WDT control  
register.  
Switching Between Modes  
The device switches between the different operating  
modes using a combination of the HALT instruction and  
the IDLEN bit in the CLKMOD register. Switching to one  
of the lower power modes enables the normal operating  
current to be reduced to a lower operating level or to a  
very low standby current level, a feature which is very  
important in low power battery applications.  
·
Normal mode  
f
M on, fSLOW on, fSYS=fM, CPU on, fS on, fWDT on/off de-  
pending upon the WDT configuration option and WDT  
control register.  
·
Slow mode0  
f
M off, fSLOW=32K_INT oscillator or the 32768Hz oscil-  
lator, fSYS=fSLOW, CPU on, fS on, fWDT on/off depending  
upon the WDT configuration option and WDT control  
register.  
Rev. 1.20  
64  
February 25, 2011  
 复制成功!