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2
Clock Control Register - CLKMOD
·
Slow mode1
M on, fSLOW=fM/2~fM/64, fSYS=fSLOW, CPU on, fS on, fWDT
gether with fSYS/4, it is used as a clock source for certain
internal functions such as the Watchdog Timer, Buzzer,
RTC Interrupt and Time Base Interrupt. The internal
clock fS, is simply a choice of either fSUB or fSYS/4, using a
configuration option.
f
on/off depending upon the WDT configuration option
and WDT control register.
·
·
Idle mode
fM, fSLOW, fSYS off, CPU off; fSUB on, fS on/off by selecting
fSUB or fSYS/4, fWDT on/off depending upon the WDT
configuration option and WDT control register.
Operating Modes
After the correct clock source configuration selections
are made, overall operation of the chosen clock is
achieved using the CLKMOD register. A combination of
the HLCLK and IDLEN bits in the CLKMOD register and
use of the HALT instruction determine in which mode the
device will be run. The devices can operate in the follow-
ing Modes.
Sleep mode
fM, fSLOW, fSYS, fS, CPU off; fSUB, fWDT on/off depending
upon the WDT configuration option and WDT control
register.
Switching Between Modes
The device switches between the different operating
modes using a combination of the HALT instruction and
the IDLEN bit in the CLKMOD register. Switching to one
of the lower power modes enables the normal operating
current to be reduced to a lower operating level or to a
very low standby current level, a feature which is very
important in low power battery applications.
·
Normal mode
f
M on, fSLOW on, fSYS=fM, CPU on, fS on, fWDT on/off de-
pending upon the WDT configuration option and WDT
control register.
·
Slow mode0
f
M off, fSLOW=32K_INT oscillator or the 32768Hz oscil-
lator, fSYS=fSLOW, CPU on, fS on, fWDT on/off depending
upon the WDT configuration option and WDT control
register.
Rev. 1.20
64
February 25, 2011