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Time Base Interrupt
Programming Considerations
flows. When the interrupt is enabled, the stack is not full
and the Time Base overflows, a subroutine call to the
Multi-function Interrupt 1 vector at location18H, will take
place. When the Time Base Interrupt is serviced, the
EMI bit will be cleared to disable other interrupts, how-
ever only the MF1F interrupt request flag will be reset.
As the TBF flag will not be automatically reset, it has to
be cleared by the application program.
By disabling the interrupt enable bits, a requested inter-
rupt can be prevented from being serviced, however,
once an interrupt request flag is set, it will remain in this
condition in the INTC0, INTC1, MFIC0 and MFIC1 reg-
isters until the corresponding interrupt is serviced or un-
til the request flag is cleared by the application program.
Note that if a specific interrupt uses a Multi-function In-
terrupt vector then its interrupt request flag will not be
automatically reset when the program enters the inter-
rupt service routine. Only the Multi-function interrupt re-
quest flag will be automatically reset.
The purpose of the Time Base function is to provide an
interrupt signal at fixed time periods. The Time Base in-
terrupt clock source originates from the Time Base inter-
rupt clock source originates from the internal clock
source fS. This fS input clock first passes through a di-
vider, the division ratio of which is selected by configura-
tion options to provide longer Time Base interrupt
periods. The Time Base interrupt time-out period ranges
from 212/fS~215/fS. The clock source that generates fS,
which in turn controls the Time Base interrupt period,
can originate from three different sources, the 32768Hz
oscillator, the 32K_INT internal oscillator or the System
oscillator/4, the choice of which is determine by the fS
clock source configuration option.
It is recommended that programs do not use the ²CALL
subroutine² instruction within the interrupt subroutine.
Interrupts often occur in an unpredictable manner or
need to be serviced immediately in some applications. If
only one stack is left and the interrupt is not well con-
trolled, the original control sequence will be damaged
once a ²CALL subroutine² is executed in the interrupt
subroutine.
All of these interrupts have the capability of waking up
the processor when in the Power Down Mode.
Essentially operating as a programmable timer, when
the Time Base overflows it will set a Time Base interrupt
flag which will in turn generate an Interrupt request via
the Multi-function Interrupt 1 vector.
Only the Program Counter is pushed onto the stack. If
the contents of the status or other registers are altered
by the interrupt service program, which may corrupt the
desired control sequence, then the contents should be
saved in advance.
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Real Time Clock Control Register - RTCC
Rev. 1.20
57
February 25, 2011
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
