HT36B0
Pad Assignment
M ID I_ T H R U
M ID I_ O U T
M ID I_ IN
V D D A
O S C 1
O S C 2
V S S A
V S S
R C H
V D D
R E S
L C H
P C 2
1
2
3
4
P C 3
5 2
P C 4
5 1
P C 6
P C 5
5 0
4 9
P C 7
4 8
4 7
4 6
4 5
4 4
4 3
4 2
4 1
4 0
3 9
3 8
3 7
3 6
3 5
3 4
3 3
3 2
3 1
3 0
2 9
2 8
(0 , 0 )
2 7
2 6
2 5
2 4
2 3
2 2
D C K
L O A D
D O U T
P D 0
P D 1
P D 2
P D 3
P D 4
P D 5
P D 6
P D 7
P E 0
P E 1
P E 2
P C 1
P C 0
P B 7
5
6
7
P B 4
8
P B 3
9
P B 2
1 0
P B 1
1 1
P B 0
1 2
P A 7
1 3
P A 6
1 4
P A 5
1 5
P A 4
1 6
P A 3
1 7 1 8
P A 2
P A 1
1 9
P A 0
2 0
IN T
2 1
P E 3
P B 5
P B 6
Chip size: 3365
´
4945 (mm)
2
* The IC substrate should be connected to VSS in the PCB layout artwork.
Rev. 1.10
3
July 3, 2008
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
