HT48RA0-3/HT48CA0-3
The conditional skip is activated by instruction. Once the
condition is met, the next instruction, fetched during the
current instruction execution, is discarded and a dummy
cycle replaces it to get the proper instruction. Otherwise
proceed with the next instruction.
The lower byte of the program counter (PCL) is a read-
able and writeable register (06H). Moving data into the
PCL performs a short jump. The destination will be
within 256 locations.
When a control transfer takes place, an additional
dummy cycle is required.
Program Memory
-
ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data and table and is organized into 1024´14 bits, ad-
dressed by the program counter and table pointer.
Certain locations in the program memory are reserved
for special usage:
·
Location 000H
ble is well-defined, the other bits of the table word are
transferred to the lower portion of TBLH, the remain-
ing 2 bits are read as
²0².
The Table Higher-order byte
register (TBLH) is read only. The table pointer (TBLP)
is a read/write register (07H), where P indicates the
table location. Before accessing the table, the location
must be placed in TBLP. The TBLH is read only and
cannot be restored. All table related instructions need
2 cycles to complete the operation. These areas may
function as normal program memory depending upon
the requirements.
Stack Register
-
STACK
This is a special part of the memory used to save the
contents of the program counter only. The stack is orga-
nized into one level and is neither part of the data nor
part of the program space, and is neither readable nor
writeable. The activated level is indexed by the stack
pointer and is neither readable nor writeable. At a sub-
routine call the contents of the program counter are
pushed onto the stack. At the end of a subroutine sig-
naled by a return instruction, RET, the program counter
is restored to its previous value from the stack. After a
chip reset, the SP will point to the top of the stack.
If the stack is full and a
²CALL²
is subsequently exe-
cuted, stack overflow occurs and the first entry will be
lost and only the most recent return address is stored.
Data Memory
-
RAM
The data memory is divided into two functional groups:
special function registers and general purpose data
memory (32´8). Most are read/write, but some are read
only.
The remaining space before the 20H is reserved for fu-
ture expanded usage and reading these locations will
return the result 00H. The general purpose data mem-
ory, addressed from 20H to 3FH, is used for data and
control information under instruction command. All data
memory areas can handle arithmetic, logic, increment,
decrement and rotate operations directly. Except for some
dedicated bits, each bit in the data memory can be set and
reset by the SET [m].i and CLR [m].i instructions, respec-
tively. They are also indirectly accessible through memory
pointer register (MP;01H).
This area is reserved for the initialization program. Af-
ter a device reset, the program always begins execu-
tion at location 000H.
·
Table location
Any location in the Program Memory space can be
used as a look-up table. The instructions TABRDC [m]
(the current page, one page=256 words) and TABRDL
[m] (the last page) transfer the contents of the
lower-order byte to the specified data memory
register, and the higher-order byte to TBLH (08H).
Only the destination of the lower-order byte in the ta-
0 0 0 H
D e v ic e in itia liz a tio n p r o g r a m
n 0 0 H
L o o k - u p ta b le ( 2 5 6 w o r d s )
n F F H
P ro g ra m
3 F F H
L o o k - u p ta b le ( 2 5 6 w o r d s )
1 4 b its
Program Memory
Table Location
Instruction(s)
*9
TABRDC [m]
TABRDL [m]
P9
1
*8
P8
1
*7
@7
@7
*6
@6
@6
*5
@5
@5
*4
@4
@4
*3
@3
@3
*2
@2
@2
*1
@1
@1
*0
@0
@0
Table Location
Note:
*9~*0: Table location bits
P9~P8: Current program counter bits
5
@7~@0: Table pointer bits
Rev.1.10
October 12, 2007
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
