Pin No.
FP-100B,
TFP-100B
Type
Symbol
I/O
Name and Function
Host interface
(HIF)
HA0
93
I
Command/data: Input pin indicating data
access or command access.
GA20
94
O
O
Gate A20: A20 gate control signal output pin.
HIRQ1
HIRQ11
HIRQ12
53
52
54
Host interrupts 1, 11, and 12: Output pins
for interrupt request signals to the host
processor.
Keyboard control KEYIN0 to 26 to 29,
I
Keyboard input: Input pins from a matrix
keyboard. (Keyboard scan signals are
normally output from P10 to P17 and P20 to
P27, allowing a maximum 16 × 16 key
matrix. The number of keys can be further
increased by use of other output ports.)
KEYIN15
32 to 35,
48, 47,
31, 30,
21, 20,
11, 10
Host interface
(expanded
modes)
XDB0 to
XDB7
91, 90, 81,
80, 69, 68,
58, 57
I/O
Host interface data bus: 8-bit bidirectional
bus by which a host processor accesses the
host interface.
Host interface
(if enabled when
STAC bit is 1 in
STCR)
ECS2
25
I
Host chip select 2: Input pin for selecting
host interface channel 2.
EIOW
24
I
I/O write: Write strobe input pin for the host
interface.
A/D converter
AN7 to
AN0
38 to 45
25
I
Analog input: Analog signal input pins for
the A/D converter.
ADTRG
I
A/D trigger: External trigger input for
starting the A/D converter.
D/A converter
DA0
DA1
44
45
O
I
Analog output: Analog signal output pins
for the D/A converter.
A/D and D/A
converters
AVCC
37
Analog reference voltage: Reference
voltage pin for the A/D and D/A converters.
If the A/D and D/A converters are not used,
connect AVCC to the system power supply.
AVSS
AVref
46
36
I
I
Analog ground: Ground pin for the A/D and
D/A converters. Connect to system ground
(0 V).
Analog reference voltage: Analog
reference voltage input pins for A/D and D/A
converters.
15
HITACHI [ HITACHI SEMICONDUCTOR ]
