Section 2 CPU
2.1
Overview
The H8/300 CPU is a fast central processing unit with eight 16-bit general registers (also
configurable as 16 eight-bit registers) and a concise instruction set designed for high-speed
operation.
2.1.1
Features
The main features of the H8/300 CPU are listed below.
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Two-way register configuration
Sixteen 8-bit general registers, or
Eight 16-bit general registers
Instruction set with 57 basic instructions, including:
Multiply and divide instructions
Powerful bit-manipulation instructions
Eight addressing modes
Register direct (Rn)
Register indirect (@Rn)
Register indirect with displacement (@(d:16, Rn))
Register indirect with post-increment or pre-decrement (@Rn+ or @–Rn)
Absolute address (@aa:8 or @aa:16)
Immediate (#xx:8 or #xx:16)
PC-relative (@(d:8, PC))
Memory indirect (@@aa:8)
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Maximum 64-kbyte address space
High-speed operation
All frequently-used instructions are executed in two to four states
Maximum clock rate (ø clock): 16 MHz at 5 V, 12 MHz at 4 V or 10 MHz at 3 V
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8- or 16-bit register-register add or subtract: 125 ns (16 MHz), 167 ns (12 MHz), 200 ns
(10 MHz)
8 × 8-bit multiply: 875 ns (16 MHz), 1167 ns (12 MHz), 1400 ns (10 MHz)
16 ÷ 8-bit divide: 875 ns (16 MHz), 1167 ns (12 MHz), 1400 ns (10 MHz)
Power-down mode
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SLEEP instruction
19
HITACHI [ HITACHI SEMICONDUCTOR ]
