Pin No.
FP-100B,
TFP-100B
Type
Symbol
I/O
Name and Function
I/O ports
P97 to P90 16 to 19,
22 to 25
I/O
Port 9: An 8-bit input/output port. The
direction of each bit (except for P96) can be
selected in the port 9 data direction register
(P9DDR). P97 is powered by I/O buffer
power supply VCCB.
PA7 to PA0 10, 11, 20,
21, 30, 31,
I/O
I/O
Port A: An 8-bit input/output port with
programming MOS input pull-ups. The
direction of each bit can be selected in the
port A data direction register (PADDR). PA7
to PA4 are powered by I/O buffer power
supply VCCB. Features a bus drive function.
47, 48
PB7 to PB0 57, 58, 68,
69, 80, 81,
Port B: An 8-bit input/output port with
programming MOS input pull-ups. The
direction of each bit can be selected in the
port B data direction register (PBDDR).
90, 91
Note: In this chip, except for the S-mask model (single-power-supply specification), the same pin
is used for STBY and FVPP. When this pin is driven low, a transition is made to hardware
standby mode. This occurs not only in the normal operating modes (modes 1, 2, and 3), but
also when programming flash memory with a PROM writer. When using a PROM
programmer to program dual-power-supply flash memory, therefore, the PROM
programmer specifications should provide for this pin to be held at the VCC level except
when programming (FVPP = 12 V).
17
HITACHI [ HITACHI SEMICONDUCTOR ]
