Bit 3—Output Compare Interrupt A Enable (OCIAE): This bit selects whether to request
output compare interrupt A (OCIA) when output compare flag A (OCFA) in TCSR is set to 1.
Bit 3: OCIAE
Description
0
1
Output compare interrupt request A (OCIA) is disabled.
Output compare interrupt request A (OCIA) is enabled.
(Initial value)
Bit 2—Output Compare Interrupt B Enable (OCIBE): This bit selects whether to request
output compare interrupt B (OCIB) when output compare flag B (OCFB) in TCSR is set to 1.
Bit 2: OCIBE
Description
0
1
Output compare interrupt request B (OCIB) is disabled.
Output compare interrupt request B (OCIB) is enabled.
(Initial value)
Bit 1—Timer Overflow Interrupt Enable (OVIE): This bit selects whether to request a free-
running timer overflow interrupt (FOVI) when the timer overflow flag (OVF) in TCSR is set to 1.
Bit 1: OVIE
Description
0
1
Timer overflow interrupt request (FOVI) is disabled.
Timer overflow interrupt request (FOVI) is enabled.
(Initial value)
Bit 0—Reserved: This bit cannot be modified and is always read as 1.
163
HITACHI [ HITACHI SEMICONDUCTOR ]
